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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-24 23:42:01 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-24 23:42:01 +0000 |
| commit | 6bab7ab11e75f675f561162f40c9b28525b4e473 (patch) | |
| tree | fbf06a1a99471ec1f0800eb95bd49e4b9fa6cdfc /llvm | |
| parent | 1411ecf08b123e841112839756b0dda502422fe6 (diff) | |
| download | bcm5719-llvm-6bab7ab11e75f675f561162f40c9b28525b4e473.tar.gz bcm5719-llvm-6bab7ab11e75f675f561162f40c9b28525b4e473.zip | |
RegBankSelect: Fix use after free in r352123
llvm-svn: 352130
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp index 25a979cd332..c4cd1a398dd 100644 --- a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp +++ b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp @@ -185,7 +185,7 @@ bool RegBankSelect::repairReg( unsigned MergeOp = RegTy.isScalar() ? TargetOpcode::G_MERGE_VALUES : TargetOpcode::G_BUILD_VECTOR; - auto &MergeBuilder = + auto MergeBuilder = MIRBuilder.buildInstrNoInsert(MergeOp) .addDef(MO.getReg()); |
