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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2016-06-07 12:48:22 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2016-06-07 12:48:22 +0000 |
| commit | 6b0634b3040a2dc37f4d41fceec1c415d9981deb (patch) | |
| tree | 0fed7d5ffb5dcee1c8697ffa29f89d4586f22532 /llvm | |
| parent | f832eb7e9f4dc161e11cad7adada2f3de90a16b3 (diff) | |
| download | bcm5719-llvm-6b0634b3040a2dc37f4d41fceec1c415d9981deb.tar.gz bcm5719-llvm-6b0634b3040a2dc37f4d41fceec1c415d9981deb.zip | |
[PowerPC] Support multiple return values with fast isel
Using an LLVM IR aggregate return value type containing three
or more integer values causes an abort in the fast isel pass.
This patch adds two more registers to RetCC_PPC64_ELF_FIS to
allow returning up to four integers with fast isel, just the
same as is currently supported with regular isel (RetCC_PPC).
This is needed for Swift and (possibly) other non-clang frontends.
Fixes PR26190.
llvm-svn: 272005
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCCallingConv.td | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/multi-return.ll | 21 |
2 files changed, 22 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCCallingConv.td b/llvm/lib/Target/PowerPC/PPCCallingConv.td index 92c51e5fc5e..53d2f77ff91 100644 --- a/llvm/lib/Target/PowerPC/PPCCallingConv.td +++ b/llvm/lib/Target/PowerPC/PPCCallingConv.td @@ -112,7 +112,7 @@ def RetCC_PPC64_ELF_FIS : CallingConv<[ CCIfType<[i8], CCPromoteToType<i64>>, CCIfType<[i16], CCPromoteToType<i64>>, CCIfType<[i32], CCPromoteToType<i64>>, - CCIfType<[i64], CCAssignToReg<[X3, X4]>>, + CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6]>>, CCIfType<[i128], CCAssignToReg<[X3, X4, X5, X6]>>, CCIfType<[f32], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>, CCIfType<[f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>, diff --git a/llvm/test/CodeGen/PowerPC/multi-return.ll b/llvm/test/CodeGen/PowerPC/multi-return.ll new file mode 100644 index 00000000000..454d1e34221 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/multi-return.ll @@ -0,0 +1,21 @@ +; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -O0 < %s | FileCheck %s +; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -O2 < %s | FileCheck %s + +; Verify that returning multiple return values in registers works, +; both with fast-isel and regular isel. + +define { i32, i32, i32, i32 } @foo() nounwind { + %A1 = insertvalue { i32, i32, i32, i32 } undef, i32 1, 0 + %A2 = insertvalue { i32, i32, i32, i32 } %A1, i32 2, 1 + %A3 = insertvalue { i32, i32, i32, i32 } %A2, i32 3, 2 + %A4 = insertvalue { i32, i32, i32, i32 } %A3, i32 4, 3 + ret { i32, i32, i32, i32 } %A4 +} + +; CHECK-LABEL: foo: +; CHECK: li 3, 1 +; CHECK: li 4, 2 +; CHECK: li 5, 3 +; CHECK: li 6, 4 +; CHECK: blr + |
