diff options
| author | Craig Topper <craig.topper@gmail.com> | 2019-11-28 11:36:55 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2019-11-28 15:30:34 -0800 |
| commit | 68ddf434c06e4a17947750de60fe4ab60315f6ad (patch) | |
| tree | 43505f5a27c8eddc66c25e9f611bb21445b43471 /llvm | |
| parent | 2485fa7739c7ecda629b51f9936457e2aaee2420 (diff) | |
| download | bcm5719-llvm-68ddf434c06e4a17947750de60fe4ab60315f6ad.tar.gz bcm5719-llvm-68ddf434c06e4a17947750de60fe4ab60315f6ad.zip | |
[LegalizeTypes] In SoftenFloatRes_FNEG, always generate integer arithmetic, never fall back to using fsub.
We would previously fallback if the type wasn't f32/f64/f128. But
I don't think any of the other floating point types ever go through
the softening code anyway. So this code is dead.
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 23 |
1 files changed, 4 insertions, 19 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp index c1b2f8edcdb..dba715bfa06 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp @@ -452,25 +452,10 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FNEG(SDNode *N) { EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); SDLoc dl(N); - EVT FloatVT = N->getValueType(0); - if (FloatVT == MVT::f32 || FloatVT == MVT::f64 || FloatVT == MVT::f128) { - // Expand Y = FNEG(X) -> Y = X ^ sign mask - APInt SignMask = APInt::getSignMask(NVT.getSizeInBits()); - return DAG.getNode(ISD::XOR, dl, NVT, GetSoftenedFloat(N->getOperand(0)), - DAG.getConstant(SignMask, dl, NVT)); - } - - // Expand Y = FNEG(X) -> Y = SUB -0.0, X - SDValue Ops[2] = { DAG.getConstantFP(-0.0, dl, N->getValueType(0)), - GetSoftenedFloat(N->getOperand(0)) }; - TargetLowering::MakeLibCallOptions CallOptions; - return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), - RTLIB::SUB_F32, - RTLIB::SUB_F64, - RTLIB::SUB_F80, - RTLIB::SUB_F128, - RTLIB::SUB_PPCF128), - NVT, Ops, CallOptions, dl).first; + // Expand Y = FNEG(X) -> Y = X ^ sign mask + APInt SignMask = APInt::getSignMask(NVT.getSizeInBits()); + return DAG.getNode(ISD::XOR, dl, NVT, GetSoftenedFloat(N->getOperand(0)), + DAG.getConstant(SignMask, dl, NVT)); } SDValue DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) { |

