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| author | Roman Lebedev <lebedev.ri@gmail.com> | 2019-10-01 17:50:09 +0000 |
|---|---|---|
| committer | Roman Lebedev <lebedev.ri@gmail.com> | 2019-10-01 17:50:09 +0000 |
| commit | 65144149d033e06b9fe357e32ed5d2bcabdc8d02 (patch) | |
| tree | f1dbf7fe25e0bda91040f9cea382dd7a73c2a9dd /llvm | |
| parent | f273fc793a9a447c30e43ace16163250b9e04f78 (diff) | |
| download | bcm5719-llvm-65144149d033e06b9fe357e32ed5d2bcabdc8d02.tar.gz bcm5719-llvm-65144149d033e06b9fe357e32ed5d2bcabdc8d02.zip | |
[InstCombine] Preserve 'exact' in -(X >>u 31) -> (X >>s 31) fold
https://rise4fun.com/Alive/yR4
llvm-svn: 373363
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp | 8 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/high-bit-signmask.ll | 4 |
2 files changed, 8 insertions, 4 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp index 9d640e849dc..7e3d405e906 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp @@ -1676,12 +1676,16 @@ Instruction *InstCombiner::visitSub(BinaryOperator &I) { if (match(Op1, m_LShr(m_Value(X), m_APInt(ShAmt))) && *ShAmt == BitWidth - 1) { Value *ShAmtOp = cast<Instruction>(Op1)->getOperand(1); - return BinaryOperator::CreateAShr(X, ShAmtOp); + Instruction *NewShift = BinaryOperator::CreateAShr(X, ShAmtOp); + NewShift->copyIRFlags(Op1); + return NewShift; } if (match(Op1, m_AShr(m_Value(X), m_APInt(ShAmt))) && *ShAmt == BitWidth - 1) { Value *ShAmtOp = cast<Instruction>(Op1)->getOperand(1); - return BinaryOperator::CreateLShr(X, ShAmtOp); + Instruction *NewShift = BinaryOperator::CreateLShr(X, ShAmtOp); + NewShift->copyIRFlags(Op1); + return NewShift; } if (Op1->hasOneUse()) { diff --git a/llvm/test/Transforms/InstCombine/high-bit-signmask.ll b/llvm/test/Transforms/InstCombine/high-bit-signmask.ll index 7c771f43dd4..4a1b395ca35 100644 --- a/llvm/test/Transforms/InstCombine/high-bit-signmask.ll +++ b/llvm/test/Transforms/InstCombine/high-bit-signmask.ll @@ -12,7 +12,7 @@ define i64 @t0(i64 %x) { } define i64 @t0_exact(i64 %x) { ; CHECK-LABEL: @t0_exact( -; CHECK-NEXT: [[R:%.*]] = ashr i64 [[X:%.*]], 63 +; CHECK-NEXT: [[R:%.*]] = ashr exact i64 [[X:%.*]], 63 ; CHECK-NEXT: ret i64 [[R]] ; %t0 = lshr exact i64 %x, 63 @@ -30,7 +30,7 @@ define i64 @t2(i64 %x) { } define i64 @t3_exact(i64 %x) { ; CHECK-LABEL: @t3_exact( -; CHECK-NEXT: [[R:%.*]] = lshr i64 [[X:%.*]], 63 +; CHECK-NEXT: [[R:%.*]] = lshr exact i64 [[X:%.*]], 63 ; CHECK-NEXT: ret i64 [[R]] ; %t0 = ashr exact i64 %x, 63 |
