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| author | Sanjay Patel <spatel@rotateright.com> | 2016-12-12 22:31:01 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-12-12 22:31:01 +0000 |
| commit | 62104ee6d997f49acb366895702f18b0e8822186 (patch) | |
| tree | 055662afea62990e6be5257416bbda3e50c179c3 /llvm | |
| parent | 6a9226d9b81cc950342419ebd65edb0dc80035b7 (diff) | |
| download | bcm5719-llvm-62104ee6d997f49acb366895702f18b0e8822186.tar.gz bcm5719-llvm-62104ee6d997f49acb366895702f18b0e8822186.zip | |
[x86] fix formatting; NFC
llvm-svn: 289476
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index ad28db840e0..d0a12b53a4c 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -12000,7 +12000,7 @@ static SDValue lowerV4F64VectorShuffle(const SDLoc &DL, ArrayRef<int> Mask, // the results into the target lanes. if (SDValue V = lowerShuffleAsRepeatedMaskAndLanePermute( DL, MVT::v4f64, V1, V2, Mask, Subtarget, DAG)) - return V; + return V; // Try to simplify this by merging 128-bit lanes to enable a lane-based // shuffle. However, if we have AVX2 and either inputs are already in place, |
