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authorJim Grosbach <grosbach@apple.com>2009-12-03 21:55:01 +0000
committerJim Grosbach <grosbach@apple.com>2009-12-03 21:55:01 +0000
commit5f9f721e95584f3cdab89be5ea5e943897fb4069 (patch)
treeaf824464631dfc901f048a02c4c489834ee70f99 /llvm
parentb2c1529d8f41248bb1280c9b2fb9603c6febd3d7 (diff)
downloadbcm5719-llvm-5f9f721e95584f3cdab89be5ea5e943897fb4069.tar.gz
bcm5719-llvm-5f9f721e95584f3cdab89be5ea5e943897fb4069.zip
remove out of date FIXME.
llvm-svn: 90490
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp1
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 15ee77bb417..1aae369583e 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -759,7 +759,6 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
assert((RC == ARM::QPRRegisterClass ||
RC == ARM::QPR_VFP2RegisterClass ||
RC == ARM::QPR_8RegisterClass) && "Unknown regclass!");
- // FIXME: Neon instructions should support predicates
if (Align >= 16
&& (getRegisterInfo().needsStackRealignment(MF))) {
AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLD1q64), DestReg)
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