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authorTim Northover <tnorthover@apple.com>2014-05-14 14:44:18 +0000
committerTim Northover <tnorthover@apple.com>2014-05-14 14:44:18 +0000
commit5f92cf60f9a96ae56053bf9deac678950619a1fa (patch)
tree5e9da76ab774509b3839ad4cb444e5dc82236549 /llvm
parent9de6fe7b83077de9bff628a4de6f69f7570650e2 (diff)
downloadbcm5719-llvm-5f92cf60f9a96ae56053bf9deac678950619a1fa.tar.gz
bcm5719-llvm-5f92cf60f9a96ae56053bf9deac678950619a1fa.zip
ARM64: remove unneeded InstPrinter hacks
Now that TableGen handles aliases, these are unneeded. Hopefully more will be able to go soon. llvm-svn: 208781
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp32
1 files changed, 0 insertions, 32 deletions
diff --git a/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp b/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
index 6002dc93836..304bc561a97 100644
--- a/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
+++ b/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
@@ -301,38 +301,6 @@ void ARM64InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
printExtend(MI, 3, O);
return;
}
- // ADD WSP, Wn, #0 ==> MOV WSP, Wn
- if (Opcode == ARM64::ADDWri && (MI->getOperand(0).getReg() == ARM64::WSP ||
- MI->getOperand(1).getReg() == ARM64::WSP) &&
- MI->getOperand(2).getImm() == 0 &&
- ARM64_AM::getShiftValue(MI->getOperand(3).getImm()) == 0) {
- O << "\tmov\t" << getRegisterName(MI->getOperand(0).getReg())
- << ", " << getRegisterName(MI->getOperand(1).getReg());
- return;
- }
- // ADD XSP, Wn, #0 ==> MOV XSP, Wn
- if (Opcode == ARM64::ADDXri && (MI->getOperand(0).getReg() == ARM64::SP ||
- MI->getOperand(1).getReg() == ARM64::SP) &&
- MI->getOperand(2).getImm() == 0 &&
- ARM64_AM::getShiftValue(MI->getOperand(3).getImm()) == 0) {
- O << "\tmov\t" << getRegisterName(MI->getOperand(0).getReg())
- << ", " << getRegisterName(MI->getOperand(1).getReg());
- return;
- }
- // ORR Wn, WZR, Wm ==> MOV Wn, Wm
- if (Opcode == ARM64::ORRWrs && MI->getOperand(1).getReg() == ARM64::WZR &&
- MI->getOperand(3).getImm() == 0) {
- O << "\tmov\t" << getRegisterName(MI->getOperand(0).getReg())
- << ", " << getRegisterName(MI->getOperand(2).getReg());
- return;
- }
- // ORR Xn, XZR, Xm ==> MOV Xn, Xm
- if (Opcode == ARM64::ORRXrs && MI->getOperand(1).getReg() == ARM64::XZR &&
- MI->getOperand(3).getImm() == 0) {
- O << "\tmov\t" << getRegisterName(MI->getOperand(0).getReg())
- << ", " << getRegisterName(MI->getOperand(2).getReg());
- return;
- }
if (!printAliasInstr(MI, O))
printInstruction(MI, O);
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