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| author | Richard Osborne <richard@xmos.com> | 2013-01-21 21:12:30 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2013-01-21 21:12:30 +0000 |
| commit | 5d477751df8417e33971f70de150af3f900f9759 (patch) | |
| tree | c546dd25084c86099f25a12ef9a1079ff409d0d2 /llvm | |
| parent | 691860c294133d58c454adb8ed94b9feeae75cc1 (diff) | |
| download | bcm5719-llvm-5d477751df8417e33971f70de150af3f900f9759.tar.gz bcm5719-llvm-5d477751df8417e33971f70de150af3f900f9759.zip | |
Fix some incorrectly named u10 / lu10 instructions.
llvm-svn: 173090
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreInstrInfo.td | 37 |
1 files changed, 12 insertions, 25 deletions
diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.td b/llvm/lib/Target/XCore/XCoreInstrInfo.td index 6288bb7c2fe..3984140b6af 100644 --- a/llvm/lib/Target/XCore/XCoreInstrInfo.td +++ b/llvm/lib/Target/XCore/XCoreInstrInfo.td @@ -649,37 +649,24 @@ defm CLRSR_branch : FU6_LU6_np<0b0111101100, "clrsr">; // TODO ldwcpl, blacp let Defs = [R11], isReMaterializable = 1, neverHasSideEffects = 1 in -def LDAP_u10 : _FU10< - (outs), - (ins i32imm:$addr), - "ldap r11, $addr", - []>; +def LDAPF_u10 : _FU10<(outs), (ins i32imm:$addr), "ldap r11, $addr", []>; let Defs = [R11], isReMaterializable = 1 in -def LDAP_lu10 : _FLU10< - (outs), - (ins i32imm:$addr), - "ldap r11, $addr", - [(set R11, (pcrelwrapper tglobaladdr:$addr))]>; +def LDAPF_lu10 : _FLU10<(outs), (ins i32imm:$addr), "ldap r11, $addr", + [(set R11, (pcrelwrapper tglobaladdr:$addr))]>; let Defs = [R11], isReMaterializable = 1 in -def LDAP_lu10_ba : _FLU10<(outs), - (ins i32imm:$addr), - "ldap r11, $addr", - [(set R11, (pcrelwrapper tblockaddress:$addr))]>; +def LDAPF_lu10_ba : _FLU10<(outs), (ins i32imm:$addr), "ldap r11, $addr", + [(set R11, (pcrelwrapper tblockaddress:$addr))]>; let isCall=1, // All calls clobber the link register and the non-callee-saved registers: Defs = [R0, R1, R2, R3, R11, LR], Uses = [SP] in { -def BL_u10 : _FU10< - (outs), (ins calltarget:$target), - "bl $target", - [(XCoreBranchLink immU10:$target)]>; - -def BL_lu10 : _FLU10< - (outs), (ins calltarget:$target), - "bl $target", - [(XCoreBranchLink immU20:$target)]>; +def BLRF_u10 : _FU10<(outs), (ins calltarget:$target), "bl $target", + [(XCoreBranchLink immU10:$target)]>; + +def BLRF_lu10 : _FLU10<(outs), (ins calltarget:$target), "bl $target", + [(XCoreBranchLink immU20:$target)]>; } // Two operand short @@ -979,8 +966,8 @@ def WAITEU_0R : _F0R<0b0000001100, (outs), (ins), // Non-Instruction Patterns //===----------------------------------------------------------------------===// -def : Pat<(XCoreBranchLink tglobaladdr:$addr), (BL_lu10 tglobaladdr:$addr)>; -def : Pat<(XCoreBranchLink texternalsym:$addr), (BL_lu10 texternalsym:$addr)>; +def : Pat<(XCoreBranchLink tglobaladdr:$addr), (BLRF_lu10 tglobaladdr:$addr)>; +def : Pat<(XCoreBranchLink texternalsym:$addr), (BLRF_lu10 texternalsym:$addr)>; /// sext_inreg def : Pat<(sext_inreg GRRegs:$b, i1), (SEXT_rus GRRegs:$b, 1)>; |

