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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-08-08 10:16:43 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-08-08 10:16:43 +0000 |
| commit | 5477f11ba304939a26ede0f85cc10696b3cc1121 (patch) | |
| tree | 7fe62d821090b1d1fec1c0393d26da89e635276c /llvm | |
| parent | 83996e4dee9972585de23227fa3c5487086d2eb0 (diff) | |
| download | bcm5719-llvm-5477f11ba304939a26ede0f85cc10696b3cc1121.tar.gz bcm5719-llvm-5477f11ba304939a26ede0f85cc10696b3cc1121.zip | |
[X86][SSE] Add divide-by-one exact sdiv vector test
Based on PR38477, we need to ensure we're testing for divide-by-one in non-uniform vectors
llvm-svn: 339231
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/test/CodeGen/X86/sdiv-exact.ll | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/sdiv-exact.ll b/llvm/test/CodeGen/X86/sdiv-exact.ll index 91505d7da7d..acd1b5b5e34 100644 --- a/llvm/test/CodeGen/X86/sdiv-exact.ll +++ b/llvm/test/CodeGen/X86/sdiv-exact.ll @@ -217,3 +217,37 @@ define <4 x i32> @test7(<4 x i32> %x) { %div = sdiv exact <4 x i32> %x, <i32 25, i32 25, i32 27, i32 27> ret <4 x i32> %div } + +define <4 x i32> @test8(<4 x i32> %x) { +; X86-LABEL: test8: +; X86: # %bb.0: +; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] +; X86-NEXT: movd %xmm1, %eax +; X86-NEXT: sarl $3, %eax +; X86-NEXT: imull $-1431655765, %eax, %eax # imm = 0xAAAAAAAB +; X86-NEXT: movd %eax, %xmm1 +; X86-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0] +; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,1,2,3] +; X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2] +; X86-NEXT: movd %xmm2, %eax +; X86-NEXT: sarl $3, %eax +; X86-NEXT: imull $-1431655765, %eax, %eax # imm = 0xAAAAAAAB +; X86-NEXT: movd %eax, %xmm1 +; X86-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0] +; X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0] +; X86-NEXT: retl +; +; X64-LABEL: test8: +; X64: # %bb.0: +; X64-NEXT: vpextrd $2, %xmm0, %eax +; X64-NEXT: sarl $3, %eax +; X64-NEXT: imull $-1431655765, %eax, %eax # imm = 0xAAAAAAAB +; X64-NEXT: vpinsrd $2, %eax, %xmm0, %xmm1 +; X64-NEXT: vpextrd $3, %xmm0, %eax +; X64-NEXT: sarl $3, %eax +; X64-NEXT: imull $-1431655765, %eax, %eax # imm = 0xAAAAAAAB +; X64-NEXT: vpinsrd $3, %eax, %xmm1, %xmm0 +; X64-NEXT: retq + %div = sdiv exact <4 x i32> %x, <i32 1, i32 1, i32 24, i32 24> + ret <4 x i32> %div +} |
