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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2006-05-15 22:34:39 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2006-05-15 22:34:39 +0000 |
| commit | 4abf33f56e98a3384ad5123223cae9e40e5b16d0 (patch) | |
| tree | fc890493291980b43a446fd3dc98385b2e5db326 /llvm | |
| parent | 26bb7c467fd7050ded7c1ffbfa7fec4310a508c7 (diff) | |
| download | bcm5719-llvm-4abf33f56e98a3384ad5123223cae9e40e5b16d0.tar.gz bcm5719-llvm-4abf33f56e98a3384ad5123223cae9e40e5b16d0.zip | |
add an abort after every assert(0)
llvm-svn: 28310
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp index f7611b65d1e..ec2b145f9ac 100644 --- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -62,6 +62,7 @@ ARMTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG) { assert(0 && "Not implemented"); + abort(); } static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) { @@ -84,6 +85,7 @@ SDOperand ARMTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { switch (Op.getOpcode()) { default: assert(0 && "Should not custom lower this!"); + abort(); case ISD::RET: return LowerRET(Op, DAG); } |

