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| author | Jim Grosbach <grosbach@apple.com> | 2011-10-03 21:12:43 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-10-03 21:12:43 +0000 |
| commit | 4ab23b5273175730bae89c97588a2178b8b73feb (patch) | |
| tree | c65b4353cf1fba3762b73d84b7b24ebf6ce8f686 /llvm | |
| parent | b1538f91dcd1f281916861e44cca6a6ebbfd478f (diff) | |
| download | bcm5719-llvm-4ab23b5273175730bae89c97588a2178b8b73feb.tar.gz bcm5719-llvm-4ab23b5273175730bae89c97588a2178b8b73feb.zip | |
ARM assembly parsing and encoding for VMRS/FMSTAT.
llvm-svn: 141025
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrFormats.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrVFP.td | 7 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 7 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/simple-fp-encoding.s | 6 |
4 files changed, 22 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrFormats.td b/llvm/lib/Target/ARM/ARMInstrFormats.td index 08a9ebdf084..220091c6198 100644 --- a/llvm/lib/Target/ARM/ARMInstrFormats.td +++ b/llvm/lib/Target/ARM/ARMInstrFormats.td @@ -227,6 +227,10 @@ class tInstAlias<string Asm, dag Result, bit Emit = 0b1> : InstAlias<Asm, Result, Emit>, Requires<[IsThumb]>; class t2InstAlias<string Asm, dag Result, bit Emit = 0b1> : InstAlias<Asm, Result, Emit>, Requires<[IsThumb2]>; +class VFP2InstAlias<string Asm, dag Result, bit Emit = 0b1> + : InstAlias<Asm, Result, Emit>, Requires<[HasVFP2]>; +class VFP3InstAlias<string Asm, dag Result, bit Emit = 0b1> + : InstAlias<Asm, Result, Emit>, Requires<[HasVFP3]>; //===----------------------------------------------------------------------===// // ARM Instruction templates. diff --git a/llvm/lib/Target/ARM/ARMInstrVFP.td b/llvm/lib/Target/ARM/ARMInstrVFP.td index 76b333e7822..7115db581fe 100644 --- a/llvm/lib/Target/ARM/ARMInstrVFP.td +++ b/llvm/lib/Target/ARM/ARMInstrVFP.td @@ -1148,3 +1148,10 @@ def FCONSTS : VFPAI<(outs SPR:$Sd), (ins vfp_f32imm:$imm), let Inst{3-0} = imm{3-0}; } } + +//===----------------------------------------------------------------------===// +// Assembler aliases. +// + +def : VFP2InstAlias<"fmstat${p}", (FMSTAT pred:$p)>; + diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 9d28a1cd092..9f69594b02a 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -3046,6 +3046,7 @@ bool ARMAsmParser::parseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands, Error(Parser.getTok().getLoc(), "unexpected token in operand"); return true; case AsmToken::Identifier: { + // If this is VMRS, check for the apsr_nzcv operand. if (!tryParseRegisterWithWriteBack(Operands)) return false; int Res = tryParseShiftRegister(Operands); @@ -3053,6 +3054,12 @@ bool ARMAsmParser::parseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands, return false; else if (Res == -1) // irrecoverable error return true; + if (Mnemonic == "vmrs" && Parser.getTok().getString() == "apsr_nzcv") { + S = Parser.getTok().getLoc(); + Parser.Lex(); + Operands.push_back(ARMOperand::CreateToken("apsr_nzcv", S)); + return false; + } // Fall though for the Identifier case that is not a register or a // special name. diff --git a/llvm/test/MC/ARM/simple-fp-encoding.s b/llvm/test/MC/ARM/simple-fp-encoding.s index f6626d75b42..67a78c435d9 100644 --- a/llvm/test/MC/ARM/simple-fp-encoding.s +++ b/llvm/test/MC/ARM/simple-fp-encoding.s @@ -114,8 +114,10 @@ @ CHECK: vnmls.f32 s1, s2, s0 @ encoding: [0x00,0x0a,0x51,0xee] vnmls.f32 s1, s2, s0 -@ FIXME: vmrs apsr_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee] -@ vmrs apsr_nzcv, fpscr +@ CHECK: vmrs apsr_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee] +@ CHECK: vmrs apsr_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee] + vmrs apsr_nzcv, fpscr + fmstat @ CHECK: vnegne.f64 d16, d16 @ encoding: [0x60,0x0b,0xf1,0x1e] vnegne.f64 d16, d16 |
