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authorJim Grosbach <grosbach@apple.com>2012-01-19 02:09:38 +0000
committerJim Grosbach <grosbach@apple.com>2012-01-19 02:09:38 +0000
commit44e5c39c29bbe8717f21e7be892cf0a63b795f36 (patch)
tree6b83550b099ebb6f97c22ce300517c2e3154fbd0 /llvm
parentb008df40d3549249cd65ea08b4d915ee3b0bd126 (diff)
downloadbcm5719-llvm-44e5c39c29bbe8717f21e7be892cf0a63b795f36.tar.gz
bcm5719-llvm-44e5c39c29bbe8717f21e7be892cf0a63b795f36.zip
Thumb2 relaxation for tADR to t2ADR.
llvm-svn: 148456
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index 2a8f7c6dc4e..ed1ea21e553 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -154,6 +154,7 @@ static unsigned getRelaxedOpcode(unsigned Op) {
default: return Op;
case ARM::tBcc: return ARM::t2Bcc;
case ARM::tLDRpciASM: return ARM::t2LDRpci;
+ case ARM::tADR: return ARM::t2ADR;
}
}
@@ -179,6 +180,7 @@ bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
int64_t Offset = int64_t(Value) - 4;
return Offset > 254 || Offset < -256;
}
+ case ARM::fixup_thumb_adr_pcrel_10:
case ARM::fixup_arm_thumb_cp: {
// If the immediate is negative, greater than 1020, or not a multiple
// of four, the wide version of the instruction must be used.
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