On Darwin x86_64 small code model doesn't guarantee code address fits in 32-bit.

llvm-svn: 72734

5 files changed, 18 insertions, 7 deletions

diff --git a/llvm/lib/Target/X86/X86Instr64bit.td b/llvm/lib/Target/X86/X86Instr64bit.td
index dc15e4aa4ee..d4e298e9ca1 100644
--- a/llvm/lib/Target/X86/X86Instr64bit.td
+++ b/llvm/lib/Target/X86/X86Instr64bit.td
@@ -1399,16 +1399,16 @@ def : Pat<(i64 (X86Wrapper texternalsym:$dst)),
 
 def : Pat<(store (i64 (X86Wrapper tconstpool:$src)), addr:$dst),
           (MOV64mi32 addr:$dst, tconstpool:$src)>,
-          Requires<[SmallCode, IsStatic]>;
+          Requires<[SmallCode, IsStatic, IsNotDarwin]>;
 def : Pat<(store (i64 (X86Wrapper tjumptable:$src)), addr:$dst),
           (MOV64mi32 addr:$dst, tjumptable:$src)>,
-          Requires<[SmallCode, IsStatic]>;
+          Requires<[SmallCode, IsStatic, IsNotDarwin]>;
 def : Pat<(store (i64 (X86Wrapper tglobaladdr:$src)), addr:$dst),
           (MOV64mi32 addr:$dst, tglobaladdr:$src)>,
-          Requires<[SmallCode, IsStatic]>;
+          Requires<[SmallCode, IsStatic, IsNotDarwin]>;
 def : Pat<(store (i64 (X86Wrapper texternalsym:$src)), addr:$dst),
           (MOV64mi32 addr:$dst, texternalsym:$src)>,
-          Requires<[SmallCode, IsStatic]>;
+          Requires<[SmallCode, IsStatic, IsNotDarwin]>;
 
 // Calls
 // Direct PC relative function call for small code model. 32-bit displacement
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index 50ae4176415..c3f82a52f1c 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -237,6 +237,7 @@ def IsStatic     : Predicate<"TM.getRelocationModel() == Reloc::Static">;
 def OptForSpeed  : Predicate<"!OptForSize">;
 def FastBTMem    : Predicate<"!Subtarget->isBTMemSlow()">;
 def CallImmAddr  : Predicate<"Subtarget->IsLegalToCallImmediateAddr(TM)">;
+def IsNotDarwin  : Predicate<"!Subtarget->isTargetDarwin()">;
 
 //===----------------------------------------------------------------------===//
 // X86 Instruction Format Definitions.
diff --git a/llvm/test/CodeGen/X86/abi-isel.ll b/llvm/test/CodeGen/X86/abi-isel.ll
index f1fec3f8b94..5decbcff92c 100644
--- a/llvm/test/CodeGen/X86/abi-isel.ll
+++ b/llvm/test/CodeGen/X86/abi-isel.ll
@@ -146,7 +146,7 @@
 ; RUN: grep movl %t | count 91
 ; RUN: not grep addl %t
 ; RUN: not grep subl %t
-; RUN: grep leaq %t | count 70
+; RUN: grep leaq %t | count 81
 ; RUN: grep movq %t | count 56
 ; RUN: grep addq %t | count 20
 ; RUN: grep subq %t | count 14
@@ -160,7 +160,7 @@
 ; RUN: not grep @PLT %t
 ; RUN: not grep @PLTOFF %t
 ; RUN: grep {call	\\\*} %t | count 10
-; RUN: grep {%rip} %t | count 139
+; RUN: grep {%rip} %t | count 150
 ; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small > %t
 ; RUN: not grep leal %t
 ; RUN: grep movl %t | count 95
diff --git a/llvm/test/CodeGen/X86/ga-offset.ll b/llvm/test/CodeGen/X86/ga-offset.ll
index cc93b4c2eef..40787cb9463 100644
--- a/llvm/test/CodeGen/X86/ga-offset.ll
+++ b/llvm/test/CodeGen/X86/ga-offset.ll
@@ -2,7 +2,7 @@
 ; RUN: not grep lea %t
 ; RUN: not grep add %t
 ; RUN: grep mov %t | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 -relocation-model=static > %t
+; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu -relocation-model=static > %t
 ; RUN: not grep lea %t
 ; RUN: not grep add %t
 ; RUN: grep mov %t | count 1
diff --git a/llvm/test/CodeGen/X86/x86-store-gv-addr.ll b/llvm/test/CodeGen/X86/x86-store-gv-addr.ll
new file mode 100644
index 00000000000..53d6a91e2a3
--- /dev/null
+++ b/llvm/test/CodeGen/X86/x86-store-gv-addr.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -relocation-model=static | grep lea
+; RUN: llvm-as < %s | llc -mtriple=x86_64-pc-linux-gnu -relocation-model=static | not grep lea
+
+@v = external global i32, align 8
+@v_addr = external global i32*, align 8
+
+define void @t() nounwind optsize {
+	store i32* @v, i32** @v_addr, align 8
+	unreachable
+}