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authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>2018-03-21 12:49:07 +0000
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>2018-03-21 12:49:07 +0000
commit43e8f7dacc13ab7456cadd6054b24f560a6eb47e (patch)
treed90b1b04d2cc64c99518e405f99b3b2060048499 /llvm
parent646ab4113f0501a0e5da0f4d10c12f3a3048f9a0 (diff)
downloadbcm5719-llvm-43e8f7dacc13ab7456cadd6054b24f560a6eb47e.tar.gz
bcm5719-llvm-43e8f7dacc13ab7456cadd6054b24f560a6eb47e.zip
[llvm-mca] Clean up some code. NFC
Removed a couple of methods from DispatchUnit. llvm-svn: 328094
Diffstat (limited to 'llvm')
-rw-r--r--llvm/tools/llvm-mca/Dispatch.cpp17
-rw-r--r--llvm/tools/llvm-mca/Dispatch.h2
2 files changed, 4 insertions, 15 deletions
diff --git a/llvm/tools/llvm-mca/Dispatch.cpp b/llvm/tools/llvm-mca/Dispatch.cpp
index 52968ea1174..3614d4d0972 100644
--- a/llvm/tools/llvm-mca/Dispatch.cpp
+++ b/llvm/tools/llvm-mca/Dispatch.cpp
@@ -119,17 +119,6 @@ void RegisterFile::invalidateRegisterMapping(const WriteState &WS) {
RegisterMappings[*I].first = nullptr;
}
-// Update the number of used mappings in the event of instruction retired.
-// This mehod delegates to the register file the task of invalidating
-// register mappings that were created for instruction IS.
-void DispatchUnit::invalidateRegisterMappings(const Instruction &IS) {
- for (const std::unique_ptr<WriteState> &WS : IS.getDefs()) {
- DEBUG(dbgs() << "[RAT] Invalidating mapping for: ");
- DEBUG(WS->dump());
- RAT->invalidateRegisterMapping(*WS.get());
- }
-}
-
void RegisterFile::collectWrites(SmallVectorImpl<WriteState *> &Writes,
unsigned RegID) const {
assert(RegID && RegID < RegisterMappings.size());
@@ -243,7 +232,9 @@ void DispatchUnit::notifyInstructionRetired(unsigned Index) {
HWInstructionEvent(HWInstructionEvent::Retired, Index));
const Instruction &IS = Owner->getInstruction(Index);
- invalidateRegisterMappings(IS);
+ for (const std::unique_ptr<WriteState> &WS : IS.getDefs())
+ RAT->invalidateRegisterMapping(*WS.get());
+
Owner->eraseInstruction(Index);
}
@@ -374,7 +365,7 @@ unsigned DispatchUnit::dispatch(unsigned IID, Instruction *NewInst,
// Allocate new mappings.
for (std::unique_ptr<WriteState> &WS : NewInst->getDefs())
- addNewRegisterMapping(*WS);
+ RAT->addRegisterMapping(*WS);
// Set the cycles left before the write-back stage.
const InstrDesc &D = NewInst->getDesc();
diff --git a/llvm/tools/llvm-mca/Dispatch.h b/llvm/tools/llvm-mca/Dispatch.h
index bd7bd168901..ceb36138114 100644
--- a/llvm/tools/llvm-mca/Dispatch.h
+++ b/llvm/tools/llvm-mca/Dispatch.h
@@ -302,7 +302,6 @@ public:
unsigned getTotalRegisterMappingsCreated(unsigned RegFileIndex = 0) const {
return RAT->getTotalRegisterMappingsCreated(RegFileIndex);
}
- void addNewRegisterMapping(WriteState &WS) { RAT->addRegisterMapping(WS); }
void cycleEvent(unsigned Cycle) {
RCU->cycleEvent();
@@ -319,7 +318,6 @@ public:
RCU->onInstructionExecuted(TokenID);
}
- void invalidateRegisterMappings(const Instruction &Inst);
#ifndef NDEBUG
void dump() const;
#endif
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