diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-07-08 16:53:48 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-07-08 16:53:48 +0000 |
| commit | 430b0497e769e87c49d4129bd81eca5054e4d274 (patch) | |
| tree | a0d2ccf1f898ab88f6c8bd637024ba0cd191cdf7 /llvm | |
| parent | 6afc666eb86213f23c9e71b084dd54b3cd9fe9eb (diff) | |
| download | bcm5719-llvm-430b0497e769e87c49d4129bd81eca5054e4d274.tar.gz bcm5719-llvm-430b0497e769e87c49d4129bd81eca5054e4d274.zip | |
AMDGPU: Move waitcnt intrinsic to instruction definition pattern
llvm-svn: 365349
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.td | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SOPInstructions.td | 14 |
2 files changed, 3 insertions, 12 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index f071ee09063..073ca6e0f34 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -745,6 +745,7 @@ def VReg32OrOffClass : AsmOperandClass { def WAIT_FLAG : Operand <i32> { let ParserMatchClass = SWaitMatchClass; let PrintMethod = "printWaitFlag"; + let OperandType = "OPERAND_IMMEDIATE"; } include "SIInstrFormats.td" diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td index 9d780573cb7..48fb62e2914 100644 --- a/llvm/lib/Target/AMDGPU/SOPInstructions.td +++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td @@ -1089,7 +1089,8 @@ def S_WAKEUP : SOPP <0x00000003, (ins), "s_wakeup"> { } let mayLoad = 1, mayStore = 1, hasSideEffects = 1 in -def S_WAITCNT : SOPP <0x0000000c, (ins WAIT_FLAG:$simm16), "s_waitcnt $simm16">; +def S_WAITCNT : SOPP <0x0000000c, (ins WAIT_FLAG:$simm16), "s_waitcnt $simm16", + [(int_amdgcn_s_waitcnt SIMM16bit:$simm16)]>; def S_SETHALT : SOPP <0x0000000d, (ins i16imm:$simm16), "s_sethalt $simm16">; def S_SETKILL : SOPP <0x0000000b, (ins i16imm:$simm16), "s_setkill $simm16">; @@ -1247,17 +1248,6 @@ def : GCNPat< >; - -//===----------------------------------------------------------------------===// -// SOPP Patterns -//===----------------------------------------------------------------------===// - -def : GCNPat < - (int_amdgcn_s_waitcnt i32:$simm16), - (S_WAITCNT (as_i16imm $simm16)) ->; - - //===----------------------------------------------------------------------===// // Target-specific instruction encodings. //===----------------------------------------------------------------------===// |
