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| author | Eric Christopher <echristo@apple.com> | 2012-05-07 05:46:29 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@apple.com> | 2012-05-07 05:46:29 +0000 |
| commit | 3ff88a05b7eb2bb3902ab4f36d44c121d7f7c6f7 (patch) | |
| tree | 5217fad548618ca6e86c83061be5a626448e427f /llvm | |
| parent | d4e1894ec1d90ee41419ba8cce138d8da8d83db3 (diff) | |
| download | bcm5719-llvm-3ff88a05b7eb2bb3902ab4f36d44c121d7f7c6f7.tar.gz bcm5719-llvm-3ff88a05b7eb2bb3902ab4f36d44c121d7f7c6f7.zip | |
Add support for the inline asm constraint 'K'.
llvm-svn: 156282
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 11 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll | 16 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/inlineasm_constraint.ll | 6 |
3 files changed, 33 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 97332cf00d1..d056f542e70 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -3041,6 +3041,7 @@ MipsTargetLowering::getSingleConstraintMatchWeight( break; case 'I': // signed 16 bit immediate case 'J': // integer zero + case 'K': // unsigned 16 bit immediate if (isa<ConstantInt>(CallOperandVal)) weight = CW_Constant; break; @@ -3113,6 +3114,16 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op, } } return; + case 'K': // unsigned 16 bit immediate + if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { + EVT Type = Op.getValueType(); + uint64_t Val = (uint64_t)C->getZExtValue(); + if (isUInt<16>(Val)) { + Result = DAG.getTargetConstant(Val, Type); + break; + } + } + return; } if (Result.getNode()) { diff --git a/llvm/test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll b/llvm/test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll new file mode 100644 index 00000000000..3baf437324a --- /dev/null +++ b/llvm/test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll @@ -0,0 +1,16 @@ +; +;This is a negative test. The constant value given for the constraint (K) +;is greater than 16 bits (0x00100000). +; +; RUN: not llc -march=mipsel < %s 2> %t +; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s + +define i32 @main() nounwind { +entry: + +;CHECK-ERRORS: error: invalid operand for inline asm constraint 'K' + + tail call i32 asm "addu $0,$1,$2", "=r,r,K"(i32 1024, i32 1048576) nounwind + ret i32 0 +} + diff --git a/llvm/test/CodeGen/Mips/inlineasm_constraint.ll b/llvm/test/CodeGen/Mips/inlineasm_constraint.ll index f053e0e2766..04bd513a682 100644 --- a/llvm/test/CodeGen/Mips/inlineasm_constraint.ll +++ b/llvm/test/CodeGen/Mips/inlineasm_constraint.ll @@ -21,6 +21,12 @@ entry: ; CHECK: #NO_APP tail call i32 asm sideeffect "addi $0,$1,$2\0A\09 ", "=r,r,J"(i32 7, i16 0) nounwind +; Now K with 64 +; CHECK: #APP +; CHECK: addu ${{[0-9]+}},${{[0-9]+}},64 +; CHECK: #NO_APP + tail call i16 asm sideeffect "addu $0,$1,$2\0A\09 ", "=r,r,K"(i16 7, i16 64) nounwind + ret i32 0 } |
