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authorFangrui Song <maskray@google.com>2019-05-16 08:31:22 +0000
committerFangrui Song <maskray@google.com>2019-05-16 08:31:22 +0000
commit3e92df3e39592f0a18b7bc7c66c0ca18cd621897 (patch)
tree81e8d2ba218848cf70d7e81e2ea3178e51eb9590 /llvm
parent0e525a4d6b6699dc00f4c6d6264b0d8b802a052e (diff)
downloadbcm5719-llvm-3e92df3e39592f0a18b7bc7c66c0ca18cd621897.tar.gz
bcm5719-llvm-3e92df3e39592f0a18b7bc7c66c0ca18cd621897.zip
Add Triple::isPPC64()
llvm-svn: 360864
Diffstat (limited to 'llvm')
-rw-r--r--llvm/include/llvm/ADT/Triple.h5
-rw-r--r--llvm/lib/Analysis/TargetLibraryInfo.cpp4
-rw-r--r--llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp3
-rw-r--r--llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp2
4 files changed, 9 insertions, 5 deletions
diff --git a/llvm/include/llvm/ADT/Triple.h b/llvm/include/llvm/ADT/Triple.h
index 136871771e9..ecbce130204 100644
--- a/llvm/include/llvm/ADT/Triple.h
+++ b/llvm/include/llvm/ADT/Triple.h
@@ -712,6 +712,11 @@ public:
return isMIPS32() || isMIPS64();
}
+ /// Tests whether the target is 64-bit PowerPC (little and big endian).
+ bool isPPC64() const {
+ return getArch() == Triple::ppc64 || getArch() == Triple::ppc64le;
+ }
+
/// Tests whether the target supports comdat
bool supportsCOMDAT() const {
return !isOSBinFormatMachO();
diff --git a/llvm/lib/Analysis/TargetLibraryInfo.cpp b/llvm/lib/Analysis/TargetLibraryInfo.cpp
index 97b5ef2f6bc..f154c6884ce 100644
--- a/llvm/lib/Analysis/TargetLibraryInfo.cpp
+++ b/llvm/lib/Analysis/TargetLibraryInfo.cpp
@@ -87,8 +87,8 @@ static void initialize(TargetLibraryInfoImpl &TLI, const Triple &T,
ShouldSignExtI32Param = false;
// PowerPC64, Sparc64, SystemZ need signext/zeroext on i32 parameters and
// returns corresponding to C-level ints and unsigned ints.
- if (T.getArch() == Triple::ppc64 || T.getArch() == Triple::ppc64le ||
- T.getArch() == Triple::sparcv9 || T.getArch() == Triple::systemz) {
+ if (T.isPPC64() || T.getArch() == Triple::sparcv9 ||
+ T.getArch() == Triple::systemz) {
ShouldExtI32Param = true;
ShouldExtI32Return = true;
}
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
index a3099c52d20..c9524da93ac 100644
--- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
+++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
@@ -147,8 +147,7 @@ public:
: MCTargetAsmParser(Options, STI, MII) {
// Check for 64-bit vs. 32-bit pointer mode.
const Triple &TheTriple = STI.getTargetTriple();
- IsPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
- TheTriple.getArch() == Triple::ppc64le);
+ IsPPC64 = TheTriple.isPPC64();
IsDarwin = TheTriple.isMacOSX();
// Initialize the set of available features.
setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
index b7d465f48d7..676efc50045 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
@@ -216,7 +216,7 @@ unsigned PPCMCCodeEmitter::getTLSRegEncoding(const MCInst &MI, unsigned OpNo,
Fixups.push_back(MCFixup::create(0, MO.getExpr(),
(MCFixupKind)PPC::fixup_ppc_nofixup));
const Triple &TT = STI.getTargetTriple();
- bool isPPC64 = TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le;
+ bool isPPC64 = TT.isPPC64();
return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2);
}
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