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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2013-12-18 14:35:37 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2013-12-18 14:35:37 +0000 |
| commit | 382ee385fd09fe66181c0336d1b80d3c0334b877 (patch) | |
| tree | b33026b466015630fbd16dd169c193d04413fa15 /llvm | |
| parent | 1c84bd64db9c7a97f8e0ecd74de2d60eb542cff2 (diff) | |
| download | bcm5719-llvm-382ee385fd09fe66181c0336d1b80d3c0334b877.tar.gz bcm5719-llvm-382ee385fd09fe66181c0336d1b80d3c0334b877.zip | |
One ppc32-darwin, a i64 inside a structure can have 32 bit alignment.
Thanks for Iain Sandoe for testing this with the original gcc.
Clang was already getting this right.
llvm-svn: 197572
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/anon_aggr.ll | 4 |
2 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp index 3d8fa1c195d..9e3f14ccaf0 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -47,7 +47,8 @@ static std::string getDataLayoutString(const PPCSubtarget &ST) { // Note, the alignment values for f64 and i64 on ppc64 in Darwin // documentation are wrong; these are correct (i.e. "what gcc does"). - Ret += "-i64:64"; + if (ST.isPPC64() || ST.isSVR4ABI()) + Ret += "-i64:64"; // Set support for 128 floats depending on the ABI. if (!ST.isPPC64() || !ST.isSVR4ABI()) diff --git a/llvm/test/CodeGen/PowerPC/anon_aggr.ll b/llvm/test/CodeGen/PowerPC/anon_aggr.ll index 94b73aba8ad..3bae5c6516c 100644 --- a/llvm/test/CodeGen/PowerPC/anon_aggr.ll +++ b/llvm/test/CodeGen/PowerPC/anon_aggr.ll @@ -119,9 +119,9 @@ unequal: ; CHECK: ld 3, -[[OFFSET1]](1) ; DARWIN32: _func3: -; DARWIN32: addi r[[REG1:[0-9]+]], r[[REGSP:[0-9]+]], 40 +; DARWIN32: addi r[[REG1:[0-9]+]], r[[REGSP:[0-9]+]], 36 ; DARWIN32: addi r[[REG2:[0-9]+]], r[[REGSP]], 24 -; DARWIN32: lwz r[[REG3:[0-9]+]], 48(r[[REGSP]]) +; DARWIN32: lwz r[[REG3:[0-9]+]], 44(r[[REGSP]]) ; DARWIN32: lwz r[[REG4:[0-9]+]], 32(r[[REGSP]]) ; DARWIN32: cmplw cr{{[0-9]+}}, r[[REG4]], r[[REG3]] ; DARWIN32: stw r[[REG3]], -[[OFFSET1:[0-9]+]] |
