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authorPuyan Lotfi <puyan@puyan.org>2018-05-13 06:07:20 +0000
committerPuyan Lotfi <puyan@puyan.org>2018-05-13 06:07:20 +0000
commit380a6f55ffd26369ae8a5167239e2c5305ed96f4 (patch)
treef0a7aca0e706368ee8f777216d52f6f9061d3f05 /llvm
parentafce413098cfd7bc95787129f8331096f66a0261 (diff)
downloadbcm5719-llvm-380a6f55ffd26369ae8a5167239e2c5305ed96f4.tar.gz
bcm5719-llvm-380a6f55ffd26369ae8a5167239e2c5305ed96f4.zip
[NFC] MIR-Canon: switching to a stable string sorting of instructions.
llvm-svn: 332191
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/CodeGen/MIRCanonicalizerPass.cpp10
-rw-r--r--llvm/test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir7
2 files changed, 12 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp b/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
index 3f7e5cf052f..a68ea1934ae 100644
--- a/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
+++ b/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
@@ -120,7 +120,8 @@ rescheduleLexographically(std::vector<MachineInstr *> instructions,
std::function<MachineBasicBlock::iterator()> getPos) {
bool Changed = false;
- std::map<std::string, MachineInstr *> StringInstrMap;
+ using StringInstrPair = std::pair<std::string, MachineInstr *>;
+ std::vector<StringInstrPair> StringInstrMap;
for (auto *II : instructions) {
std::string S;
@@ -130,9 +131,14 @@ rescheduleLexographically(std::vector<MachineInstr *> instructions,
// Trim the assignment, or start from the begining in the case of a store.
const size_t i = S.find("=");
- StringInstrMap.insert({(i == std::string::npos) ? S : S.substr(i), II});
+ StringInstrMap.push_back({(i == std::string::npos) ? S : S.substr(i), II});
}
+ std::sort(StringInstrMap.begin(), StringInstrMap.end(),
+ [](StringInstrPair &a, StringInstrPair &b) {
+ return (a.first < b.first);
+ });
+
for (auto &II : StringInstrMap) {
DEBUG({
diff --git a/llvm/test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir b/llvm/test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir
index 72e8f0b3e5a..bcbefb05445 100644
--- a/llvm/test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir
+++ b/llvm/test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir
@@ -2,9 +2,10 @@
# These Idempotent instructions are sorted alphabetically (based on after the '=')
# CHECK: %namedVReg4352:gpr64 = MOVi64imm 4617315517961601024
# CHECK: %namedVReg4353:gpr32 = MOVi32imm 408
-# CHECK: %namedVReg4354:gpr64all = IMPLICIT_DEF
-# CHECK: %namedVReg4355:fpr64 = FMOVDi 20
-# CHECK: %namedVReg4356:fpr64 = FMOVDi 112
+# CHECK: %namedVReg4354:gpr32 = MOVi32imm 408
+# CHECK: %namedVReg4355:gpr64all = IMPLICIT_DEF
+# CHECK: %namedVReg4356:fpr64 = FMOVDi 20
+# CHECK: %namedVReg4357:fpr64 = FMOVDi 112
...
---
name: Proc8
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