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| author | NAKAMURA Takumi <geek4civic@gmail.com> | 2013-02-05 14:44:16 +0000 |
|---|---|---|
| committer | NAKAMURA Takumi <geek4civic@gmail.com> | 2013-02-05 14:44:16 +0000 |
| commit | 3753b28cd2ace328935ec15ca9dfd6d4a06def4f (patch) | |
| tree | 7b04608d9668432231df168eaa7869c9b9a2aba7 /llvm | |
| parent | 1bc7298c441318b6199152571dd9f221d390cab1 (diff) | |
| download | bcm5719-llvm-3753b28cd2ace328935ec15ca9dfd6d4a06def4f.tar.gz bcm5719-llvm-3753b28cd2ace328935ec15ca9dfd6d4a06def4f.zip | |
Revert r174343, "When the target-independent DAGCombiner inferred a higher alignment for a load,"
It caused hangups in compiling clang/lib/Parse/ParseDecl.cpp and clang/lib/Driver/Tools.cpp in stage2 on some hosts.
llvm-svn: 174374
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 7 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/func-argpassing.ll | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/divide-by-constant.ll | 6 |
3 files changed, 6 insertions, 10 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 39a8e82796a..79ec227a22b 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -7199,15 +7199,12 @@ SDValue DAGCombiner::visitLOAD(SDNode *N) { // Try to infer better alignment information than the load already has. if (OptLevel != CodeGenOpt::None && LD->isUnindexed()) { if (unsigned Align = DAG.InferPtrAlignment(Ptr)) { - if (Align > LD->getAlignment()) { - SDValue NewLoad = - DAG.getExtLoad(LD->getExtensionType(), N->getDebugLoc(), + if (Align > LD->getAlignment()) + return DAG.getExtLoad(LD->getExtensionType(), N->getDebugLoc(), LD->getValueType(0), Chain, Ptr, LD->getPointerInfo(), LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), Align); - return CombineTo(N, NewLoad, SDValue(NewLoad.getNode(), 1), true); - } } } diff --git a/llvm/test/CodeGen/AArch64/func-argpassing.ll b/llvm/test/CodeGen/AArch64/func-argpassing.ll index 760c8d49d07..db58798ca55 100644 --- a/llvm/test/CodeGen/AArch64/func-argpassing.ll +++ b/llvm/test/CodeGen/AArch64/func-argpassing.ll @@ -178,8 +178,7 @@ define void @check_i128_stackalign(i32 %val0, i32 %val1, i32 %val2, i32 %val3, ; Nothing local on stack in current codegen, so first stack is 16 away ; CHECK: ldr {{x[0-9]+}}, [sp, #16] ; Important point is that we address sp+24 for second dword -; CHECK: add [[REG:x[0-9]+]], sp, #16 -; CHECK: ldr {{x[0-9]+}}, {{\[}}[[REG]], #8] +; CHECK: ldr {{x[0-9]+}}, [sp, #24] ret void } diff --git a/llvm/test/CodeGen/X86/divide-by-constant.ll b/llvm/test/CodeGen/X86/divide-by-constant.ll index 9669d97cb7f..8e7c13d8efa 100644 --- a/llvm/test/CodeGen/X86/divide-by-constant.ll +++ b/llvm/test/CodeGen/X86/divide-by-constant.ll @@ -56,9 +56,9 @@ entry: %div = sdiv i16 %x, 10 ret i16 %div ; CHECK: test6: -; CHECK: imull $26215, %eax, %ecx -; CHECK: sarl $18, %ecx -; CHECK: shrl $15, %eax +; CHECK: imull $26215, %eax, %eax +; CHECK: shrl $31, %ecx +; CHECK: sarl $18, %eax } define i32 @test7(i32 %x) nounwind { |

