diff options
| author | Craig Topper <craig.topper@intel.com> | 2017-08-28 05:14:38 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-08-28 05:14:38 +0000 |
| commit | 33681161c4dd2e95cd01ff84863c4401f7046381 (patch) | |
| tree | 087b0d64d516532d83e9f6754c40a602b65d28da /llvm | |
| parent | 2c77011d1538dd24a497b66155e0e2f70f9e4480 (diff) | |
| download | bcm5719-llvm-33681161c4dd2e95cd01ff84863c4401f7046381.tar.gz bcm5719-llvm-33681161c4dd2e95cd01ff84863c4401f7046381.zip | |
[X86] Use getUnpackl helper to create an ISD::VECTOR_SHUFFLE instead of using X86ISD::UNPCKL in reduceVMULWidth.
This runs fairly early, we should use target independent nodes if possible.
llvm-svn: 311873
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index c9afea2d163..9616220171a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -31373,7 +31373,7 @@ static SDValue reduceVMULWidth(SDNode *N, SelectionDAG &DAG, // Repack the lower part and higher part result of mul into a wider // result. Make sure the type of mul result is VT. MVT ResVT = MVT::getVectorVT(MVT::i32, RegSize / 32); - SDValue Res = DAG.getNode(X86ISD::UNPCKL, DL, OpsVT, MulLo, MulHi); + SDValue Res = getUnpackl(DAG, DL, OpsVT, MulLo, MulHi); Res = DAG.getNode(ISD::BITCAST, DL, ResVT, Res); return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Res, DAG.getIntPtrConstant(0, DL)); |

