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authorTom Stellard <tstellar@redhat.com>2017-08-02 22:56:30 +0000
committerTom Stellard <tstellar@redhat.com>2017-08-02 22:56:30 +0000
commit3337d743999a8f68d7d1c2415088a89d4e73a60e (patch)
tree80cc65e3940310fded0406235fe634cbcd028ca3 /llvm
parent0357e8de3b2c0e9a744921e787bee88abcfa7f48 (diff)
downloadbcm5719-llvm-3337d743999a8f68d7d1c2415088a89d4e73a60e.tar.gz
bcm5719-llvm-3337d743999a8f68d7d1c2415088a89d4e73a60e.zip
AMDGPU/GlobalISel: Mark 32-bit G_FMUL as legal
Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D36218 llvm-svn: 309898
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp2
-rw-r--r--llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir22
2 files changed, 24 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index 21b2181b8ef..7d7848cf916 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -53,6 +53,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo() {
setAction({G_FCONSTANT, S32}, Legal);
+ setAction({G_FMUL, S32}, Legal);
+
setAction({G_GEP, P1}, Legal);
setAction({G_GEP, P2}, Legal);
setAction({G_GEP, 1, S64}, Legal);
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
new file mode 100644
index 00000000000..2191ff4356c
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
@@ -0,0 +1,22 @@
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel %s -o - | FileCheck %s
+
+--- |
+ define void @test_fmul() { ret void }
+...
+
+---
+name: test_fmul
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+body: |
+ bb.0:
+ liveins: %vgpr0, %vgpr1
+ ; CHECK-LABEL: name: test_fmul
+ ; CHECK: %2(s32) = G_FMUL %0, %1
+
+ %0(s32) = COPY %vgpr0
+ %1(s32) = COPY %vgpr1
+ %2(s32) = G_FMUL %0, %1
+...
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