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authorBill Wendling <isanbard@gmail.com>2013-05-30 00:32:04 +0000
committerBill Wendling <isanbard@gmail.com>2013-05-30 00:32:04 +0000
commit2aa007c59c106199e49ab419e819bd1ed90d08d1 (patch)
tree56f354840bd2e5e9c05e0628065724e53fe2e599 /llvm
parentc6634d397e7f80837b8b3aab1bd5ccdeda2cefef (diff)
downloadbcm5719-llvm-2aa007c59c106199e49ab419e819bd1ed90d08d1.tar.gz
bcm5719-llvm-2aa007c59c106199e49ab419e819bd1ed90d08d1.zip
This testcase tests command line attributes which we don't yet support.
In fact, we're probably going to support these flags in completely different ways. So this test is no longer valid. llvm-svn: 182899
Diffstat (limited to 'llvm')
-rw-r--r--llvm/test/CodeGen/X86/subtarget-feature-change.ll62
1 files changed, 0 insertions, 62 deletions
diff --git a/llvm/test/CodeGen/X86/subtarget-feature-change.ll b/llvm/test/CodeGen/X86/subtarget-feature-change.ll
deleted file mode 100644
index 04d4a719963..00000000000
--- a/llvm/test/CodeGen/X86/subtarget-feature-change.ll
+++ /dev/null
@@ -1,62 +0,0 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
-
-; This should not generate SSE instructions:
-;
-; CHECK: without.sse:
-; CHECK: flds
-; CHECK: fmuls
-; CHECK: fstps
-define void @without.sse(float* nocapture %a, float* nocapture %b, float* nocapture %c, i32 %n) #0 {
-entry:
- %cmp9 = icmp sgt i32 %n, 0
- br i1 %cmp9, label %for.body, label %for.end
-
-for.body:
- %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
- %arrayidx = getelementptr inbounds float* %b, i64 %indvars.iv
- %0 = load float* %arrayidx, align 4
- %arrayidx2 = getelementptr inbounds float* %c, i64 %indvars.iv
- %1 = load float* %arrayidx2, align 4
- %mul = fmul float %0, %1
- %arrayidx4 = getelementptr inbounds float* %a, i64 %indvars.iv
- store float %mul, float* %arrayidx4, align 4
- %indvars.iv.next = add i64 %indvars.iv, 1
- %lftr.wideiv = trunc i64 %indvars.iv.next to i32
- %exitcond = icmp eq i32 %lftr.wideiv, %n
- br i1 %exitcond, label %for.end, label %for.body
-
-for.end:
- ret void
-}
-
-; This should generate SSE instructions:
-;
-; CHECK: with.sse
-; CHECK: movss
-; CHECK: mulss
-; CHECK: movss
-define void @with.sse(float* nocapture %a, float* nocapture %b, float* nocapture %c, i32 %n) #1 {
-entry:
- %cmp9 = icmp sgt i32 %n, 0
- br i1 %cmp9, label %for.body, label %for.end
-
-for.body:
- %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
- %arrayidx = getelementptr inbounds float* %b, i64 %indvars.iv
- %0 = load float* %arrayidx, align 4
- %arrayidx2 = getelementptr inbounds float* %c, i64 %indvars.iv
- %1 = load float* %arrayidx2, align 4
- %mul = fmul float %0, %1
- %arrayidx4 = getelementptr inbounds float* %a, i64 %indvars.iv
- store float %mul, float* %arrayidx4, align 4
- %indvars.iv.next = add i64 %indvars.iv, 1
- %lftr.wideiv = trunc i64 %indvars.iv.next to i32
- %exitcond = icmp eq i32 %lftr.wideiv, %n
- br i1 %exitcond, label %for.end, label %for.body
-
-for.end:
- ret void
-}
-
-attributes #0 = { nounwind optsize ssp uwtable "target-cpu"="core2" "target-features"="-sse4a,-avx2,-xop,-fma4,-bmi2,-3dnow,-3dnowa,-pclmul,-sse,-avx,-sse41,-ssse3,+mmx,-rtm,-sse42,-lzcnt,-f16c,-popcnt,-bmi,-aes,-fma,-rdrand,-sse2,-sse3" }
-attributes #1 = { nounwind optsize ssp uwtable "target-cpu"="core2" "target-features"="-sse4a,-avx2,-xop,-fma4,-bmi2,-3dnow,-3dnowa,-pclmul,+sse,-avx,-sse41,+ssse3,+mmx,-rtm,-sse42,-lzcnt,-f16c,-popcnt,-bmi,-aes,-fma,-rdrand,+sse2,+sse3" }
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