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authorBill Wendling <isanbard@gmail.com>2010-11-29 01:07:48 +0000
committerBill Wendling <isanbard@gmail.com>2010-11-29 01:07:48 +0000
commit232e52cfb74ccb25207f6f9595d0d1dfc01fd24e (patch)
tree7bc47479a6a7eb6004a427a8ff2369eb0343d0e0 /llvm
parentccba1a8d95586588aa2e6f0edd08becf46c0c855 (diff)
downloadbcm5719-llvm-232e52cfb74ccb25207f6f9595d0d1dfc01fd24e.tar.gz
bcm5719-llvm-232e52cfb74ccb25207f6f9595d0d1dfc01fd24e.zip
Add more Thumb encodings.
llvm-svn: 120279
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrThumb.td42
-rw-r--r--llvm/test/MC/ARM/thumb.s8
2 files changed, 38 insertions, 12 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td
index 0a53bbb3f46..3af89341196 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb.td
@@ -1177,24 +1177,42 @@ def tSXTH : T1pI<(outs tGPR:$Rd), (ins tGPR:$Rm), IIC_iUNAr,
// test
let isCompare = 1, isCommutable = 1, Defs = [CPSR] in
-def tTST : T1pI<(outs), (ins tGPR:$lhs, tGPR:$rhs), IIC_iTSTr,
- "tst", "\t$lhs, $rhs",
- [(ARMcmpZ (and_su tGPR:$lhs, tGPR:$rhs), 0)]>,
- T1DataProcessing<0b1000>;
+def tTST : T1pI<(outs), (ins tGPR:$Rn, tGPR:$Rm), IIC_iTSTr,
+ "tst", "\t$Rn, $Rm",
+ [(ARMcmpZ (and_su tGPR:$Rn, tGPR:$Rm), 0)]>,
+ T1DataProcessing<0b1000> {
+ // A8.6.230
+ bits<3> Rm;
+ bits<3> Rn;
+ let Inst{5-3} = Rm;
+ let Inst{2-0} = Rn;
+}
// zero-extend byte
-def tUXTB : T1pI<(outs tGPR:$dst), (ins tGPR:$src), IIC_iUNAr,
- "uxtb", "\t$dst, $src",
- [(set tGPR:$dst, (and tGPR:$src, 0xFF))]>,
+def tUXTB : T1pI<(outs tGPR:$Rd), (ins tGPR:$Rm), IIC_iUNAr,
+ "uxtb", "\t$Rd, $Rm",
+ [(set tGPR:$Rd, (and tGPR:$Rm, 0xFF))]>,
Requires<[IsThumb, IsThumb1Only, HasV6]>,
- T1Misc<{0,0,1,0,1,1,?}>;
+ T1Misc<{0,0,1,0,1,1,?}> {
+ // A8.6.262
+ bits<3> Rm;
+ bits<3> Rd;
+ let Inst{5-3} = Rm;
+ let Inst{2-0} = Rd;
+}
// zero-extend short
-def tUXTH : T1pI<(outs tGPR:$dst), (ins tGPR:$src), IIC_iUNAr,
- "uxth", "\t$dst, $src",
- [(set tGPR:$dst, (and tGPR:$src, 0xFFFF))]>,
+def tUXTH : T1pI<(outs tGPR:$Rd), (ins tGPR:$Rm), IIC_iUNAr,
+ "uxth", "\t$Rd, $Rm",
+ [(set tGPR:$Rd, (and tGPR:$Rm, 0xFFFF))]>,
Requires<[IsThumb, IsThumb1Only, HasV6]>,
- T1Misc<{0,0,1,0,1,0,?}>;
+ T1Misc<{0,0,1,0,1,0,?}> {
+ // A8.6.264
+ bits<3> Rm;
+ bits<3> Rd;
+ let Inst{5-3} = Rm;
+ let Inst{2-0} = Rd;
+}
// Conditional move tMOVCCr - Used to implement the Thumb SELECT_CC operation.
diff --git a/llvm/test/MC/ARM/thumb.s b/llvm/test/MC/ARM/thumb.s
index 386dcfe7acf..2db97c37bf5 100644
--- a/llvm/test/MC/ARM/thumb.s
+++ b/llvm/test/MC/ARM/thumb.s
@@ -24,3 +24,11 @@
@ CHECK: sxth r2, r3 @ encoding: [0x1a,0xb2]
sxtb r2, r3
sxth r2, r3
+
+@ CHECK: tst r4, r5 @ encoding: [0x2c,0x42]
+ tst r4, r5
+
+@ CHECK: uxtb r3, r6 @ encoding: [0xf3,0xb2]
+@ CHECK: uxth r3, r6 @ encoding: [0xb3,0xb2]
+ uxtb r3, r6
+ uxth r3, r6
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