diff options
| author | Tom Stellard <thomas.stellard@amd.com> | 2014-10-07 21:09:20 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-10-07 21:09:20 +0000 |
| commit | 20fa0be97fc0348acd3651417f48e9a8ca455ac2 (patch) | |
| tree | 0efab3c0fc90dbd115805cd7832caf19d73a2a1e /llvm | |
| parent | 506c684d5501b26da6a09974fb59fad0731ced25 (diff) | |
| download | bcm5719-llvm-20fa0be97fc0348acd3651417f48e9a8ca455ac2.tar.gz bcm5719-llvm-20fa0be97fc0348acd3651417f48e9a8ca455ac2.zip | |
R600/SI: Remove assertion in SIInstrInfo::areLoadsFromSameBasePtr()
Added a FIXME coment instead, we need to handle the case where the
two DS instructions being compared have different numbers of operands.
llvm-svn: 219236
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.cpp | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/R600/load.ll | 18 |
2 files changed, 22 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.cpp b/llvm/lib/Target/R600/SIInstrInfo.cpp index af2177a6e76..fc2c63d6618 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.cpp +++ b/llvm/lib/Target/R600/SIInstrInfo.cpp @@ -88,7 +88,10 @@ bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, return false; if (isDS(Opc0) && isDS(Opc1)) { - assert(getNumOperandsNoGlue(Load0) == getNumOperandsNoGlue(Load1)); + + // FIXME: Handle this case: + if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1)) + return false; // Check base reg. if (Load0->getOperand(1) != Load1->getOperand(1)) diff --git a/llvm/test/CodeGen/R600/load.ll b/llvm/test/CodeGen/R600/load.ll index d92ade1cfa1..ff489b58f81 100644 --- a/llvm/test/CodeGen/R600/load.ll +++ b/llvm/test/CodeGen/R600/load.ll @@ -701,3 +701,21 @@ entry: store <2 x float> %0, <2 x float> addrspace(1)* %out ret void } + +; Test loading a i32 and v2i32 value from the same base pointer. +; FUNC-LABEL: {{^}}load_i32_v2i32_local: +; R600-CHECK: LDS_READ_RET +; R600-CHECK: LDS_READ_RET +; R600-CHECK: LDS_READ_RET +; SI-CHECK-DAG: DS_READ_B32 +; SI-CHECK-DAG: DS_READ2_B32 +define void @load_i32_v2i32_local(<2 x i32> addrspace(1)* %out, i32 addrspace(3)* %in) { + %scalar = load i32 addrspace(3)* %in + %tmp0 = bitcast i32 addrspace(3)* %in to <2 x i32> addrspace(3)* + %vec_ptr = getelementptr <2 x i32> addrspace(3)* %tmp0, i32 2 + %vec0 = load <2 x i32> addrspace(3)* %vec_ptr, align 4 + %vec1 = insertelement <2 x i32> <i32 0, i32 0>, i32 %scalar, i32 0 + %vec = add <2 x i32> %vec0, %vec1 + store <2 x i32> %vec, <2 x i32> addrspace(1)* %out + ret void +} |

