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authorSanjay Patel <spatel@rotateright.com>2019-10-14 21:56:40 +0000
committerSanjay Patel <spatel@rotateright.com>2019-10-14 21:56:40 +0000
commit1f40f15d54aac06421448b6de131231d2d78bc75 (patch)
treeda67f8a42ddd2b267bf4de0f8e48196c1e8e5ae1 /llvm
parent9585d8c11a57f1d5038465ab8f90461c701053fb (diff)
downloadbcm5719-llvm-1f40f15d54aac06421448b6de131231d2d78bc75.tar.gz
bcm5719-llvm-1f40f15d54aac06421448b6de131231d2d78bc75.zip
[InstCombine] fold a shifted bool zext to a select
For a constant shift amount, add the following fold. shl (zext (i1 X)), ShAmt --> select (X, 1 << ShAmt, 0) https://rise4fun.com/Alive/IZ9 Fixes PR42257. Based on original patch by @zvi (Zvi Rackover) Differential Revision: https://reviews.llvm.org/D63382 llvm-svn: 374828
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp6
-rw-r--r--llvm/test/Transforms/InstCombine/and.ll3
-rw-r--r--llvm/test/Transforms/InstCombine/shift.ll9
3 files changed, 10 insertions, 8 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index ca1885a6128..9187c70fb84 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -934,6 +934,12 @@ Instruction *InstCombiner::visitShl(BinaryOperator &I) {
return BinaryOperator::CreateLShr(
ConstantInt::get(Ty, APInt::getSignMask(BitWidth)), X);
+ // shl (zext (i1 X)), C1 --> select (X, 1 << C1, 0)
+ if (match(Op0, m_ZExt(m_Value(X))) && X->getType()->isIntOrIntVectorTy(1)) {
+ auto *NewC = ConstantExpr::getShl(ConstantInt::get(Ty, 1), C1);
+ return SelectInst::Create(X, NewC, ConstantInt::getNullValue(Ty));
+ }
+
return nullptr;
}
diff --git a/llvm/test/Transforms/InstCombine/and.ll b/llvm/test/Transforms/InstCombine/and.ll
index 4925013b195..025f05793ec 100644
--- a/llvm/test/Transforms/InstCombine/and.ll
+++ b/llvm/test/Transforms/InstCombine/and.ll
@@ -346,8 +346,7 @@ define i32 @test30(i1 %X) {
define i32 @test31(i1 %X) {
; CHECK-LABEL: @test31(
-; CHECK-NEXT: [[Y:%.*]] = zext i1 %X to i32
-; CHECK-NEXT: [[Z:%.*]] = shl nuw nsw i32 [[Y]], 4
+; CHECK-NEXT: [[Z:%.*]] = select i1 [[X:%.*]], i32 16, i32 0
; CHECK-NEXT: ret i32 [[Z]]
;
%Y = zext i1 %X to i32
diff --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll
index 885c4f238e0..61f03317279 100644
--- a/llvm/test/Transforms/InstCombine/shift.ll
+++ b/llvm/test/Transforms/InstCombine/shift.ll
@@ -1181,8 +1181,7 @@ define <2 x i65> @test_63(<2 x i64> %t) {
define i32 @test_shl_zext_bool(i1 %t) {
; CHECK-LABEL: @test_shl_zext_bool(
-; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[T:%.*]] to i32
-; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw i32 [[EXT]], 2
+; CHECK-NEXT: [[SHL:%.*]] = select i1 [[T:%.*]], i32 4, i32 0
; CHECK-NEXT: ret i32 [[SHL]]
;
%ext = zext i1 %t to i32
@@ -1192,8 +1191,7 @@ define i32 @test_shl_zext_bool(i1 %t) {
define <2 x i32> @test_shl_zext_bool_splat(<2 x i1> %t) {
; CHECK-LABEL: @test_shl_zext_bool_splat(
-; CHECK-NEXT: [[EXT:%.*]] = zext <2 x i1> [[T:%.*]] to <2 x i32>
-; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw <2 x i32> [[EXT]], <i32 3, i32 3>
+; CHECK-NEXT: [[SHL:%.*]] = select <2 x i1> [[T:%.*]], <2 x i32> <i32 8, i32 8>, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[SHL]]
;
%ext = zext <2 x i1> %t to <2 x i32>
@@ -1203,8 +1201,7 @@ define <2 x i32> @test_shl_zext_bool_splat(<2 x i1> %t) {
define <2 x i32> @test_shl_zext_bool_vec(<2 x i1> %t) {
; CHECK-LABEL: @test_shl_zext_bool_vec(
-; CHECK-NEXT: [[EXT:%.*]] = zext <2 x i1> [[T:%.*]] to <2 x i32>
-; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> [[EXT]], <i32 2, i32 3>
+; CHECK-NEXT: [[SHL:%.*]] = select <2 x i1> [[T:%.*]], <2 x i32> <i32 4, i32 8>, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[SHL]]
;
%ext = zext <2 x i1> %t to <2 x i32>
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