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authorEvan Cheng <evan.cheng@apple.com>2007-05-23 07:19:12 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-05-23 07:19:12 +0000
commit1e25f56508ea1a81b9fcdcf674c7ff36ed6ea42b (patch)
treec0a87c2de501e130327edcc11b1f19b45d50addc /llvm
parent688b2807df098c5d8947ffd36c31b2189983dd94 (diff)
downloadbcm5719-llvm-1e25f56508ea1a81b9fcdcf674c7ff36ed6ea42b.tar.gz
bcm5719-llvm-1e25f56508ea1a81b9fcdcf674c7ff36ed6ea42b.zip
Add a couple of target hooks for predication.
llvm-svn: 37306
Diffstat (limited to 'llvm')
-rw-r--r--llvm/include/llvm/Target/TargetInstrInfo.h15
1 files changed, 14 insertions, 1 deletions
diff --git a/llvm/include/llvm/Target/TargetInstrInfo.h b/llvm/include/llvm/Target/TargetInstrInfo.h
index b2fc53af177..bb1dfd2b36b 100644
--- a/llvm/include/llvm/Target/TargetInstrInfo.h
+++ b/llvm/include/llvm/Target/TargetInstrInfo.h
@@ -393,10 +393,23 @@ public:
abort();
}
+ /// isPredicable - Returns true if the instruction is already predicated.
+ ///
+ virtual bool isPredicated(MachineInstr *MI) const {
+ return false;
+ }
+
/// PredicateInstruction - Convert the instruction into a predicated
/// instruction. It returns true if the operation was successful.
virtual bool PredicateInstruction(MachineInstr *MI,
- std::vector<MachineOperand> &Cond) const;
+ std::vector<MachineOperand> &Pred) const;
+
+ /// SubsumesPredicate - Returns true if the first specified predicated
+ /// subsumes the second, e.g. GE subsumes GT.
+ virtual bool SubsumesPredicate(std::vector<MachineOperand> &Pred1,
+ std::vector<MachineOperand> &Pred2) const {
+ return false;
+ }
/// getPointerRegClass - Returns a TargetRegisterClass used for pointer
/// values.
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