summaryrefslogtreecommitdiffstats
path: root/llvm
diff options
context:
space:
mode:
authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-09-19 17:47:53 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-09-19 17:47:53 +0000
commit1e166766c3a542bff833fb2d70008b7928b9582b (patch)
tree757b7958c9c706f15b76c4c34f10a9af11d93754 /llvm
parentd650a8cfc1a0e285015c9670ff25451564cb23a7 (diff)
downloadbcm5719-llvm-1e166766c3a542bff833fb2d70008b7928b9582b.tar.gz
bcm5719-llvm-1e166766c3a542bff833fb2d70008b7928b9582b.zip
Move "(void)variable" closer to the assertion that uses it, NFC
llvm-svn: 313649
Diffstat (limited to 'llvm')
-rw-r--r--llvm/utils/TableGen/RegisterInfoEmitter.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/RegisterInfoEmitter.cpp b/llvm/utils/TableGen/RegisterInfoEmitter.cpp
index 92fa270c0fb..5b2659d64ef 100644
--- a/llvm/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/llvm/utils/TableGen/RegisterInfoEmitter.cpp
@@ -1236,7 +1236,6 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
<< " = {\n";
for (unsigned M = 0; M < NumModes; ++M) {
unsigned EV = 0;
- (void)EV;
OS << " // Mode = " << M << " (";
if (M == 0)
OS << "Default";
@@ -1245,6 +1244,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
OS << ")\n";
for (const auto &RC : RegisterClasses) {
assert(RC.EnumValue == EV++ && "Unexpected order of register classes");
+ (void)EV;
const RegSizeInfo &RI = RC.RSI.get(M);
OS << " { " << RI.RegSize << ", " << RI.SpillSize << ", "
<< RI.SpillAlignment;
OpenPOWER on IntegriCloud