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author | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-13 19:33:32 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-13 19:33:32 +0000 |
commit | 1daf8c2a1626d7d80df27aa3dbbcdc9471007a4c (patch) | |
tree | 8c3441c2ef2cc49b30b92b949032b5641a173ce7 /llvm | |
parent | 9586618c58d3b09b780f5ec2bc0e6e9d9c758171 (diff) | |
download | bcm5719-llvm-1daf8c2a1626d7d80df27aa3dbbcdc9471007a4c.tar.gz bcm5719-llvm-1daf8c2a1626d7d80df27aa3dbbcdc9471007a4c.zip |
Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp.
llvm-svn: 158414
Diffstat (limited to 'llvm')
-rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 12 | ||||
-rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.h | 5 | ||||
-rw-r--r-- | llvm/test/CodeGen/Mips/memcpy.ll | 19 |
3 files changed, 36 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index d6a8b8e3658..aa777f7c2c1 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -303,6 +303,8 @@ MipsTargetLowering(MipsTargetMachine &TM) setExceptionPointerRegister(IsN64 ? Mips::A0_64 : Mips::A0); setExceptionSelectorRegister(IsN64 ? Mips::A1_64 : Mips::A1); + + maxStoresPerMemcpy = 16; } bool MipsTargetLowering::allowsUnalignedMemoryAccesses(EVT VT) const { @@ -3455,6 +3457,16 @@ MipsTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const { return false; } +EVT MipsTargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign, + unsigned SrcAlign, bool IsZeroVal, + bool MemcpyStrSrc, + MachineFunction &MF) const { + if (Subtarget->hasMips64()) + return MVT::i64; + + return MVT::i32; +} + bool MipsTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const { if (VT != MVT::f32 && VT != MVT::f64) return false; diff --git a/llvm/lib/Target/Mips/MipsISelLowering.h b/llvm/lib/Target/Mips/MipsISelLowering.h index 740cf06406f..e45d352b415 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.h +++ b/llvm/lib/Target/Mips/MipsISelLowering.h @@ -195,6 +195,11 @@ namespace llvm { virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + virtual EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, + unsigned SrcAlign, bool IsZeroVal, + bool MemcpyStrSrc, + MachineFunction &MF) const; + /// isFPImmLegal - Returns true if the target can instruction select the /// specified FP immediate natively. If false, the legalizer will /// materialize the FP immediate as a load from a constant pool. diff --git a/llvm/test/CodeGen/Mips/memcpy.ll b/llvm/test/CodeGen/Mips/memcpy.ll new file mode 100644 index 00000000000..39764a93638 --- /dev/null +++ b/llvm/test/CodeGen/Mips/memcpy.ll @@ -0,0 +1,19 @@ +; RUN: llc -march=mipsel < %s | FileCheck %s + +%struct.S1 = type { i32, [41 x i8] } + +@.str = private unnamed_addr constant [31 x i8] c"abcdefghijklmnopqrstuvwxyzABCD\00", align 1 + +define void @foo1(%struct.S1* %s1, i8 signext %n) nounwind { +entry: +; CHECK-NOT: call16(memcpy + + %arraydecay = getelementptr inbounds %struct.S1* %s1, i32 0, i32 1, i32 0 + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %arraydecay, i8* getelementptr inbounds ([31 x i8]* @.str, i32 0, i32 0), i32 31, i32 1, i1 false) + %arrayidx = getelementptr inbounds %struct.S1* %s1, i32 0, i32 1, i32 40 + store i8 %n, i8* %arrayidx, align 1 + ret void +} + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind + |