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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2006-08-14 19:01:24 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2006-08-14 19:01:24 +0000 |
| commit | 157971b04aab9d8d0e25e959ea4d25cc4aa4b2a8 (patch) | |
| tree | 062636cff3d1d8db54e6bea13194eb8b3a1afa89 /llvm | |
| parent | 235c1555c3607850e1840421f4bc5f0ab232dcf6 (diff) | |
| download | bcm5719-llvm-157971b04aab9d8d0e25e959ea4d25cc4aa4b2a8.tar.gz bcm5719-llvm-157971b04aab9d8d0e25e959ea4d25cc4aa4b2a8.zip | |
select code like
ldr rx, [ry, #offset]
llvm-svn: 29664
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 35 | ||||
| -rw-r--r-- | llvm/test/Regression/CodeGen/ARM/ldr.ll | 23 |
2 files changed, 57 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp index 06af4b3d2e0..dd6800a13c0 100644 --- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -258,7 +258,8 @@ static SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG) { static SDOperand LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG) { GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); - SDOperand CPAddr = DAG.getConstantPool(GV, MVT::i32, 2); + int alignment = 2; + SDOperand CPAddr = DAG.getConstantPool(GV, MVT::i32, alignment); return DAG.getLoad(MVT::i32, DAG.getEntryNode(), CPAddr, DAG.getSrcValue(NULL)); } @@ -336,9 +337,41 @@ void ARMDAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) { ScheduleAndEmitDAG(DAG); } +static bool isInt12Immediate(SDNode *N, short &Imm) { + if (N->getOpcode() != ISD::Constant) + return false; + + int32_t t = cast<ConstantSDNode>(N)->getValue(); + int max = 2<<12 - 1; + int min = -max; + if (t > min && t < max) { + Imm = t; + return true; + } + else + return false; +} + +static bool isInt12Immediate(SDOperand Op, short &Imm) { + return isInt12Immediate(Op.Val, Imm); +} + //register plus/minus 12 bit offset bool ARMDAGToDAGISel::SelectAddrRegImm(SDOperand N, SDOperand &Offset, SDOperand &Base) { + if (N.getOpcode() == ISD::ADD) { + short imm = 0; + if (isInt12Immediate(N.getOperand(1), imm)) { + Offset = CurDAG->getTargetConstant(imm, MVT::i32); + if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N.getOperand(0))) { + Base = CurDAG->getTargetFrameIndex(FI->getIndex(), N.getValueType()); + } else { + Base = N.getOperand(0); + } + return true; // [r+i] + } + } + Offset = CurDAG->getTargetConstant(0, MVT::i32); if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N)) { Base = CurDAG->getTargetFrameIndex(FI->getIndex(), N.getValueType()); diff --git a/llvm/test/Regression/CodeGen/ARM/ldr.ll b/llvm/test/Regression/CodeGen/ARM/ldr.ll new file mode 100644 index 00000000000..4f25a1e71f9 --- /dev/null +++ b/llvm/test/Regression/CodeGen/ARM/ldr.ll @@ -0,0 +1,23 @@ +; RUN: llvm-as < %s | llc -march=arm && +; RUN: llvm-as < %s | llc -march=arm | grep "ldr r0.*#0" | wc -l | grep 2 && +; RUN: llvm-as < %s | llc -march=arm | grep "ldr r0.*#4092" | wc -l | grep 1 + +int %f1(int* %v) { +entry: + %tmp = load int* %v ; <int> [#uses=1] + ret int %tmp +} + +int %f2(int* %v) { +entry: + %tmp2 = getelementptr int* %v, int 1023 ; <int*> [#uses=1] + %tmp = load int* %tmp2 ; <int> [#uses=1] + ret int %tmp +} + +int %f3(int* %v) { +entry: + %tmp2 = getelementptr int* %v, int 1024 ; <int*> [#uses=1] + %tmp = load int* %tmp2 ; <int> [#uses=1] + ret int %tmp +} |

