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authorBill Wendling <isanbard@gmail.com>2012-10-22 23:30:04 +0000
committerBill Wendling <isanbard@gmail.com>2012-10-22 23:30:04 +0000
commit12cda50f1f043a3b8d41dbd8c5becdbd8fe16b6d (patch)
tree48e7ba27ad4877337189821104e1d5fc3a929ecd /llvm
parent4750b77ea119a9367ec4ae180e4003c7ebc8b16a (diff)
downloadbcm5719-llvm-12cda50f1f043a3b8d41dbd8c5becdbd8fe16b6d.tar.gz
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When a block ends in an indirect branch, add its successors to the machine basic block.
The CFG of the machine function needs to know that the targets of the indirect branch are successors to the indirect branch. <rdar://problem/12529625> llvm-svn: 166448
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp5
-rw-r--r--llvm/test/CodeGen/ARM/indirectbr-2.ll46
2 files changed, 51 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 92248f53178..89b85d09b72 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -1388,6 +1388,11 @@ bool ARMFastISel::SelectIndirectBr(const Instruction *I) {
unsigned Opc = isThumb2 ? ARM::tBRIND : ARM::BX;
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc))
.addReg(AddrReg));
+
+ const IndirectBrInst *IB = cast<IndirectBrInst>(I);
+ for (unsigned i = 0, e = IB->getNumSuccessors(); i != e; ++i)
+ FuncInfo.MBB->addSuccessor(FuncInfo.MBBMap[IB->getSuccessor(i)]);
+
return true;
}
diff --git a/llvm/test/CodeGen/ARM/indirectbr-2.ll b/llvm/test/CodeGen/ARM/indirectbr-2.ll
new file mode 100644
index 00000000000..084f520a8ee
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/indirectbr-2.ll
@@ -0,0 +1,46 @@
+; RUN: llc < %s -O0 -relocation-model=pic -mtriple=thumbv7-apple-ios | FileCheck %s
+; <rdar://problem/12529625>
+
+@foo = global i32 34879, align 4
+@DWJumpTable2808 = global [2 x i32] [i32 sub (i32 ptrtoint (i8* blockaddress(@func, %14) to i32), i32 ptrtoint (i8* blockaddress(@func, %4) to i32)), i32 sub (i32 ptrtoint (i8* blockaddress(@func, %13) to i32), i32 ptrtoint (i8* blockaddress(@func, %4) to i32))]
+@0 = internal constant [45 x i8] c"func XXXXXXXXXXX :: bb xxxxxxxxxxxxxxxxxxxx\0A\00"
+
+; The indirect branch has the two destinations as successors. The lone PHI
+; statement shouldn't be implicitly defined.
+
+; CHECK: func:
+; CHECK: Ltmp1: @ Block address taken
+; CHECK-NOT: @ implicit-def: R0
+; CHECK: @ 4-byte Reload
+
+define i32 @func() nounwind ssp {
+ %1 = alloca i32, align 4
+ %2 = load i32* @foo, align 4
+ %3 = icmp eq i32 %2, 34879
+ br label %4
+
+; <label>:4 ; preds = %0
+ %5 = zext i1 %3 to i32
+ %6 = mul i32 %5, 287
+ %7 = add i32 %6, 2
+ %8 = getelementptr [2 x i32]* @DWJumpTable2808, i32 0, i32 %5
+ %9 = load i32* %8
+ %10 = add i32 %9, ptrtoint (i8* blockaddress(@func, %4) to i32)
+ %11 = inttoptr i32 %10 to i8*
+ %12 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([45 x i8]* @0, i32 0, i32 0))
+ indirectbr i8* %11, [label %13, label %14]
+
+; <label>:13 ; preds = %4
+ %tmp14 = phi i32 [ %7, %4 ]
+ store i32 23958, i32* @foo, align 4
+ %tmp15 = load i32* %1, align 4
+ %tmp16 = icmp eq i32 %tmp15, 0
+ %tmp17 = zext i1 %tmp16 to i32
+ %tmp21 = add i32 %tmp17, %tmp14
+ ret i32 %tmp21
+
+; <label>:14 ; preds = %4
+ ret i32 42
+}
+
+declare i32 @printf(i8*, ...)
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