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authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-08-09 03:04:29 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-08-09 03:04:29 +0000
commit1155b1eafabcbba0ddc88bd3bcfbdb0a1f7ee107 (patch)
tree2bccefd9366900f3f0eb8fad3fe977e0eab2a5bc /llvm
parent0d0964d0998b8f291d74bb828ab017e5a3f9cee3 (diff)
downloadbcm5719-llvm-1155b1eafabcbba0ddc88bd3bcfbdb0a1f7ee107.tar.gz
bcm5719-llvm-1155b1eafabcbba0ddc88bd3bcfbdb0a1f7ee107.zip
Add support for avx vector fextend
llvm-svn: 137105
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/X86/X86InstrSSE.td7
-rw-r--r--llvm/test/CodeGen/X86/avx-cvt.ll6
2 files changed, 12 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td
index 986e428b9ee..79d455a326c 100644
--- a/llvm/lib/Target/X86/X86InstrSSE.td
+++ b/llvm/lib/Target/X86/X86InstrSSE.td
@@ -1093,12 +1093,17 @@ def : Pat<(int_x86_avx_cvtt_ps2dq_256 VR256:$src),
def : Pat<(int_x86_avx_cvtt_ps2dq_256 (memopv8f32 addr:$src)),
(VCVTTPS2DQYrm addr:$src)>;
-// Match fround for 128/256-bit conversions
+// Match fround and fextend for 128/256-bit conversions
def : Pat<(v4f32 (fround (v4f64 VR256:$src))),
(VCVTPD2PSYrr VR256:$src)>;
def : Pat<(v4f32 (fround (loadv4f64 addr:$src))),
(VCVTPD2PSYrm addr:$src)>;
+def : Pat<(v4f64 (fextend (v4f32 VR128:$src))),
+ (VCVTPS2PDYrr VR128:$src)>;
+def : Pat<(v4f64 (fextend (loadv4f32 addr:$src))),
+ (VCVTPS2PDYrm addr:$src)>;
+
//===----------------------------------------------------------------------===//
// SSE 1 & 2 - Compare Instructions
//===----------------------------------------------------------------------===//
diff --git a/llvm/test/CodeGen/X86/avx-cvt.ll b/llvm/test/CodeGen/X86/avx-cvt.ll
index 6da47af5ab5..e45010c903e 100644
--- a/llvm/test/CodeGen/X86/avx-cvt.ll
+++ b/llvm/test/CodeGen/X86/avx-cvt.ll
@@ -20,6 +20,12 @@ define <8 x float> @fptrunc00(<8 x double> %b) nounwind {
ret <8 x float> %a
}
+; CHECK: vcvtps2pd %xmm
+define <4 x double> @fpext00(<4 x float> %b) nounwind {
+ %a = fpext <4 x float> %b to <4 x double>
+ ret <4 x double> %a
+}
+
; CHECK: vcvtsi2sdq (%
define double @funcA(i64* nocapture %e) nounwind uwtable readonly ssp {
entry:
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