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| author | Craig Topper <craig.topper@gmail.com> | 2011-12-31 23:15:11 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2011-12-31 23:15:11 +0000 |
| commit | 0e796fee11e7ca916becee332e365311240ab7b8 (patch) | |
| tree | 31ba1a3b93ee029a79cd6e89db323e99a36808d0 /llvm | |
| parent | b59008c6948ec1114fd1171d474e887549270db3 (diff) | |
| download | bcm5719-llvm-0e796fee11e7ca916becee332e365311240ab7b8.tar.gz bcm5719-llvm-0e796fee11e7ca916becee332e365311240ab7b8.zip | |
Fix typo in a SHUFPD and VSHUFPD pattern that prevented SHUFPD/VSHUFPD with a load from being selected.
llvm-svn: 147392
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/avx-vshufp.ll | 36 |
2 files changed, 36 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index ec6957b472b..911150347f0 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -2348,7 +2348,7 @@ let Predicates = [HasSSE2] in { (SHUFPDrri VR128:$src1, VR128:$src2, (SHUFFLE_get_shuf_imm VR128:$src3))>; // Generic SHUFPD patterns - def : Pat<(v2f64 (X86Shufps VR128:$src1, + def : Pat<(v2f64 (X86Shufpd VR128:$src1, (memopv2f64 addr:$src2), (i8 imm:$imm))), (SHUFPDrmi VR128:$src1, addr:$src2, imm:$imm)>; def : Pat<(v2i64 (X86Shufpd VR128:$src1, VR128:$src2, (i8 imm:$imm))), @@ -2397,7 +2397,7 @@ let Predicates = [HasAVX] in { (VSHUFPDrri VR128:$src1, VR128:$src2, (SHUFFLE_get_shuf_imm VR128:$src3))>; - def : Pat<(v2f64 (X86Shufps VR128:$src1, + def : Pat<(v2f64 (X86Shufpd VR128:$src1, (memopv2f64 addr:$src2), (i8 imm:$imm))), (VSHUFPDrmi VR128:$src1, addr:$src2, imm:$imm)>; def : Pat<(v2i64 (X86Shufpd VR128:$src1, VR128:$src2, (i8 imm:$imm))), diff --git a/llvm/test/CodeGen/X86/avx-vshufp.ll b/llvm/test/CodeGen/X86/avx-vshufp.ll index 0ccbc594a0d..a60d8c25dc5 100644 --- a/llvm/test/CodeGen/X86/avx-vshufp.ll +++ b/llvm/test/CodeGen/X86/avx-vshufp.ll @@ -7,7 +7,7 @@ entry: ret <8 x float> %shuffle } -; CHECK: vshufps $-53, (% +; CHECK: vshufps $-53, (%{{.*}}), %ymm define <8 x float> @A2(<8 x float>* %a, <8 x float>* %b) nounwind uwtable readnone ssp { entry: %a2 = load <8 x float>* %a @@ -23,7 +23,7 @@ entry: ret <4 x double> %shuffle } -; CHECK: vshufpd $10, (% +; CHECK: vshufpd $10, (%{{.*}}), %ymm define <4 x double> @B2(<4 x double>* %a, <4 x double>* %b) nounwind uwtable readnone ssp { entry: %a2 = load <4 x double>* %a @@ -59,3 +59,35 @@ entry: %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 7> ret <4 x double> %shuffle } + +; CHECK: vshufps $-53, %xmm +define <4 x float> @A128(<4 x float> %a, <4 x float> %b) nounwind uwtable readnone ssp { +entry: + %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 4, i32 7> + ret <4 x float> %shuffle +} + +; CHECK: vshufps $-53, (%{{.*}}), %xmm +define <4 x float> @A2128(<4 x float>* %a, <4 x float>* %b) nounwind uwtable readnone ssp { +entry: + %a2 = load <4 x float>* %a + %b2 = load <4 x float>* %b + %shuffle = shufflevector <4 x float> %a2, <4 x float> %b2, <4 x i32> <i32 3, i32 2, i32 4, i32 7> + ret <4 x float> %shuffle +} + +; CHECK: vshufpd $1, %xmm +define <2 x double> @B128(<2 x double> %a, <2 x double> %b) nounwind uwtable readnone ssp { +entry: + %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 2> + ret <2 x double> %shuffle +} + +; CHECK: vshufpd $1, (%{{.*}}), %xmm +define <2 x double> @B2128(<2 x double>* %a, <2 x double>* %b) nounwind uwtable readnone ssp { +entry: + %a2 = load <2 x double>* %a + %b2 = load <2 x double>* %b + %shuffle = shufflevector <2 x double> %a2, <2 x double> %b2, <2 x i32> <i32 1, i32 2> + ret <2 x double> %shuffle +} |

