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| author | Jiong Wang <jiwang@tilera.com> | 2019-02-28 19:22:34 +0000 |
|---|---|---|
| committer | Jiong Wang <jiwang@tilera.com> | 2019-02-28 19:22:34 +0000 |
| commit | 0a039660fa85f725f693b5de3bf207df22bcca3d (patch) | |
| tree | 9619af3b29f9f6a98d23ef3b3e89eb611dd463ba /llvm | |
| parent | 3da8bcd0a06d54cc53f7fcae998fe829a6fec094 (diff) | |
| download | bcm5719-llvm-0a039660fa85f725f693b5de3bf207df22bcca3d.tar.gz bcm5719-llvm-0a039660fa85f725f693b5de3bf207df22bcca3d.zip | |
bpf: disassembler support for XADD under sub-register mode
Like the other load/store instructions, "w" register is preferred when
disassembling BPF_STX | BPF_W | BPF_XADD.
v1 -> v2:
- Updated testcase insn-unit.s (Yonghong)
Acked-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
llvm-svn: 355127
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp | 3 | ||||
| -rw-r--r-- | llvm/test/MC/BPF/insn-unit.s | 3 | ||||
| -rw-r--r-- | llvm/test/MC/BPF/load-store-32.s | 3 |
3 files changed, 7 insertions, 2 deletions
diff --git a/llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp b/llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp index ed09e446e73..c5be7cb1a4e 100644 --- a/llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp +++ b/llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp @@ -171,9 +171,10 @@ DecodeStatus BPFDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, if (Result == MCDisassembler::Fail) return MCDisassembler::Fail; uint8_t InstClass = getInstClass(Insn); + uint8_t InstMode = getInstMode(Insn); if ((InstClass == BPF_LDX || InstClass == BPF_STX) && getInstSize(Insn) != BPF_DW && - getInstMode(Insn) == BPF_MEM && + (InstMode == BPF_MEM || InstMode == BPF_XADD) && STI.getFeatureBits()[BPF::ALU32]) Result = decodeInstruction(DecoderTableBPFALU3264, Instr, Insn, Address, this, STI); diff --git a/llvm/test/MC/BPF/insn-unit.s b/llvm/test/MC/BPF/insn-unit.s index c61c0024128..ff56cfa3966 100644 --- a/llvm/test/MC/BPF/insn-unit.s +++ b/llvm/test/MC/BPF/insn-unit.s @@ -57,7 +57,8 @@ lock *(u32 *)(r2 + 16) += r9 // BPF_STX | BPF_W | BPF_XADD lock *(u64 *)(r3 - 30) += r10 // BPF_STX | BPF_DW | BPF_XADD -// CHECK: c3 92 10 00 00 00 00 00 lock *(u32 *)(r2 + 16) += r9 +// CHECK-64: c3 92 10 00 00 00 00 00 lock *(u32 *)(r2 + 16) += r9 +// CHECK-32: c3 92 10 00 00 00 00 00 lock *(u32 *)(r2 + 16) += w9 // CHECK: db a3 e2 ff 00 00 00 00 lock *(u64 *)(r3 - 30) += r10 // ======== BPF_JMP Class ======== diff --git a/llvm/test/MC/BPF/load-store-32.s b/llvm/test/MC/BPF/load-store-32.s index 73ed9fcb3e0..be576d27204 100644 --- a/llvm/test/MC/BPF/load-store-32.s +++ b/llvm/test/MC/BPF/load-store-32.s @@ -17,9 +17,12 @@ *(u8 *)(r0 + 0) = w7 // BPF_STX | BPF_B *(u16 *)(r1 + 8) = w8 // BPF_STX | BPF_H *(u32 *)(r2 + 16) = w9 // BPF_STX | BPF_W + lock *(u32 *)(r2 + 16) += w9 // BPF_STX | BPF_W | BPF_XADD // CHECK-32: 73 70 00 00 00 00 00 00 *(u8 *)(r0 + 0) = w7 // CHECK-32: 6b 81 08 00 00 00 00 00 *(u16 *)(r1 + 8) = w8 // CHECK-32: 63 92 10 00 00 00 00 00 *(u32 *)(r2 + 16) = w9 +// CHECK-32: c3 92 10 00 00 00 00 00 lock *(u32 *)(r2 + 16) += w9 // CHECK: 73 70 00 00 00 00 00 00 *(u8 *)(r0 + 0) = r7 // CHECK: 6b 81 08 00 00 00 00 00 *(u16 *)(r1 + 8) = r8 // CHECK: 63 92 10 00 00 00 00 00 *(u32 *)(r2 + 16) = r9 +// CHECK: c3 92 10 00 00 00 00 00 lock *(u32 *)(r2 + 16) += r9 |
