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authorSimon Pilgrim <llvm-dev@redking.me.uk>2015-07-05 19:06:32 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2015-07-05 19:06:32 +0000
commit08049fedc7e2099387546af7b62664672dbf294f (patch)
tree482c82dba505be28ab1efcb980f07acb7e71fc15 /llvm
parent434cb684a84d0bb9d1e77dd7d97b80dc809e2f2b (diff)
downloadbcm5719-llvm-08049fedc7e2099387546af7b62664672dbf294f.tar.gz
bcm5719-llvm-08049fedc7e2099387546af7b62664672dbf294f.zip
[X86][SSE3] Just use an explicit SSE3 target attribute - not a cpu type.
Merged arch/target into a specific triple - we had i686 and x86_64 targets overriding each other.... llvm-svn: 241410
Diffstat (limited to 'llvm')
-rw-r--r--llvm/test/CodeGen/X86/sse3.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/X86/sse3.ll b/llvm/test/CodeGen/X86/sse3.ll
index c1cd91beaf5..398675276c6 100644
--- a/llvm/test/CodeGen/X86/sse3.ll
+++ b/llvm/test/CodeGen/X86/sse3.ll
@@ -1,6 +1,6 @@
; These are tests for SSE3 codegen.
-; RUN: llc < %s -march=x86-64 -mcpu=nocona -mtriple=i686-apple-darwin9 -O3 | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 --mattr=+sse3 | FileCheck %s --check-prefix=X64
; Test for v8xi16 lowering where we extract the first element of the vector and
; placed it in the second element of the result.
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