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authorSimon Pilgrim <llvm-dev@redking.me.uk>2017-12-06 13:14:44 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2017-12-06 13:14:44 +0000
commit07dc6d6975a97fb948e91e4eadec1e1dba09c385 (patch)
treedd763632e57c8378f3808c86880cd398ca46e941 /llvm
parentd4f5987c5895ee36fbac586f1f9be428a54f7099 (diff)
downloadbcm5719-llvm-07dc6d6975a97fb948e91e4eadec1e1dba09c385.tar.gz
bcm5719-llvm-07dc6d6975a97fb948e91e4eadec1e1dba09c385.zip
[X86][AVX512] Drop default NoItinerary arguments that aren't needed
Requires reordering of AVX512_maskable_common arguments, but helps track what is still missing itinerary tags llvm-svn: 319890
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/X86/X86InstrAVX512.td12
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index 867b35d93ec..3a8d98be9cf 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -252,9 +252,9 @@ multiclass AVX512_maskable_common<bits<8> O, Format F, X86VectorVTInfo _,
string OpcodeStr,
string AttSrcAsm, string IntelSrcAsm,
dag RHS, dag MaskingRHS,
+ InstrItinClass itin,
SDNode Select = vselect,
string MaskingConstraint = "",
- InstrItinClass itin = NoItinerary,
bit IsCommutable = 0,
bit IsKCommutable = 0> :
AVX512_maskable_custom<O, F, Outs, Ins, MaskingIns, ZeroMaskingIns, OpcodeStr,
@@ -302,8 +302,8 @@ multiclass AVX512_maskable<bits<8> O, Format F, X86VectorVTInfo _,
!con((ins _.RC:$src0, _.KRCWM:$mask), Ins),
!con((ins _.KRCWM:$mask), Ins),
OpcodeStr, AttSrcAsm, IntelSrcAsm, RHS,
- (Select _.KRCWM:$mask, RHS, _.RC:$src0), Select,
- "$src0 = $dst", itin, IsCommutable, IsKCommutable>;
+ (Select _.KRCWM:$mask, RHS, _.RC:$src0), itin,
+ Select, "$src0 = $dst", IsCommutable, IsKCommutable>;
// This multiclass generates the unconditional/non-masking, the masking and
// the zero-masking variant of the scalar instruction.
@@ -323,7 +323,7 @@ multiclass AVX512_maskable_scalar<bits<8> O, Format F, X86VectorVTInfo _,
multiclass AVX512_maskable_3src<bits<8> O, Format F, X86VectorVTInfo _,
dag Outs, dag NonTiedIns, string OpcodeStr,
string AttSrcAsm, string IntelSrcAsm,
- dag RHS, InstrItinClass itin = NoItinerary,
+ dag RHS, InstrItinClass itin,
bit IsCommutable = 0,
bit IsKCommutable = 0,
SDNode Select = vselect,
@@ -334,8 +334,8 @@ multiclass AVX512_maskable_3src<bits<8> O, Format F, X86VectorVTInfo _,
!con((ins _.RC:$src1, _.KRCWM:$mask), NonTiedIns),
OpcodeStr, AttSrcAsm, IntelSrcAsm,
!if(MaskOnly, (null_frag), RHS),
- (Select _.KRCWM:$mask, RHS, _.RC:$src1),
- Select, "", itin, IsCommutable, IsKCommutable>;
+ (Select _.KRCWM:$mask, RHS, _.RC:$src1), itin,
+ Select, "", IsCommutable, IsKCommutable>;
multiclass AVX512_maskable_3src_scalar<bits<8> O, Format F, X86VectorVTInfo _,
dag Outs, dag NonTiedIns, string OpcodeStr,
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