summaryrefslogtreecommitdiffstats
path: root/llvm
diff options
context:
space:
mode:
authorAnton Korobeynikov <asl@math.spbu.ru>2008-04-23 18:26:03 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2008-04-23 18:26:03 +0000
commit0516b6f2b006f32ac8494cd6239eca8d2271c73c (patch)
treed2d46d8fe89cd4eb53ad3a66ce6ae40ad983fcd4 /llvm
parentdd4ef2e30ca29910444178db5c0138fa252f048c (diff)
downloadbcm5719-llvm-0516b6f2b006f32ac8494cd6239eca8d2271c73c.tar.gz
bcm5719-llvm-0516b6f2b006f32ac8494cd6239eca8d2271c73c.zip
Unbreak JIT
llvm-svn: 50173
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/CodeGen/LLVMTargetMachine.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
index 3927eee5035..4004cf1e180 100644
--- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
@@ -224,6 +224,10 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
if (EnableSinking)
PM.add(createMachineSinkingPass());
+ // Run pre-ra passes.
+ if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(cerr));
+
// Perform register allocation to convert to a concrete x86 representation
PM.add(createRegisterAllocator());
OpenPOWER on IntegriCloud