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authorChris Lattner <sabre@nondot.org>2006-10-17 22:41:45 +0000
committerChris Lattner <sabre@nondot.org>2006-10-17 22:41:45 +0000
commit0408e5b7ce4cd1678d6e784706adc150240fa328 (patch)
tree9f839b8a52d4045584254f3e3c2c432d6a6904e9 /llvm
parente1a72005de6aa7f62d21e623fb6d75eca78658e1 (diff)
downloadbcm5719-llvm-0408e5b7ce4cd1678d6e784706adc150240fa328.tar.gz
bcm5719-llvm-0408e5b7ce4cd1678d6e784706adc150240fa328.zip
expose DWARF_LABEL opcode# so the branch folder can update debug info properly.
llvm-svn: 31024
Diffstat (limited to 'llvm')
-rw-r--r--llvm/include/llvm/Target/TargetInstrInfo.h7
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstrInfo.h7
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.cpp7
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.h5
4 files changed, 26 insertions, 0 deletions
diff --git a/llvm/include/llvm/Target/TargetInstrInfo.h b/llvm/include/llvm/Target/TargetInstrInfo.h
index 794117058c8..e74cb138ab0 100644
--- a/llvm/include/llvm/Target/TargetInstrInfo.h
+++ b/llvm/include/llvm/Target/TargetInstrInfo.h
@@ -219,6 +219,13 @@ public:
return get(Opcode).Flags & M_VARIABLE_OPS;
}
+ /// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
+ /// instruction if it has one. This is used by codegen passes that update
+ /// DWARF line number info as they modify the code.
+ virtual unsigned getDWARF_LABELOpcode() const {
+ return 0;
+ }
+
/// Return true if the instruction is a register to register move
/// and leave the source and dest operands in the passed parameters.
virtual bool isMoveInstr(const MachineInstr& MI,
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.h b/llvm/lib/Target/PowerPC/PPCInstrInfo.h
index 265e1e76c2f..dc16aed4dc2 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.h
@@ -77,6 +77,13 @@ public:
/// This is used for addressing modes.
virtual const TargetRegisterClass *getPointerRegClass() const;
+ /// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
+ /// instruction if it has one. This is used by codegen passes that update
+ /// DWARF line number info as they modify the code.
+ virtual unsigned getDWARF_LABELOpcode() const {
+ return PPC::DWARF_LABEL;
+ }
+
// Return true if the instruction is a register to register move and
// leave the source and dest operands in the passed parameters.
//
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 939b8691c43..65321616bf6 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -25,6 +25,13 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
TM(tm), RI(tm, *this) {
}
+/// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
+/// instruction if it has one. This is used by codegen passes that update
+/// DWARF line number info as they modify the code.
+unsigned X86InstrInfo::getDWARF_LABELOpcode() const {
+ return X86::DWARF_LABEL;
+}
+
bool X86InstrInfo::isMoveInstr(const MachineInstr& MI,
unsigned& sourceReg,
diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h
index 3e0694f8b3f..4ceb98d1797 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.h
+++ b/llvm/lib/Target/X86/X86InstrInfo.h
@@ -205,6 +205,11 @@ public:
unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
+ /// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
+ /// instruction if it has one. This is used by codegen passes that update
+ /// DWARF line number info as they modify the code.
+ virtual unsigned getDWARF_LABELOpcode() const;
+
/// convertToThreeAddress - This method must be implemented by targets that
/// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target
/// may be able to convert a two-address instruction into a true
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