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authorChad Rosier <mcrosier@apple.com>2011-11-11 02:38:59 +0000
committerChad Rosier <mcrosier@apple.com>2011-11-11 02:38:59 +0000
commit023ede56492692f83fca80048b183da5ee3f0c5d (patch)
tree6557f4d2a1d3e2694447759a6da53617858564c5 /llvm
parent4f64e1819b914f8ab9a5d6262b48506510d66d97 (diff)
downloadbcm5719-llvm-023ede56492692f83fca80048b183da5ee3f0c5d.tar.gz
bcm5719-llvm-023ede56492692f83fca80048b183da5ee3f0c5d.zip
When loading a value, treat an i1 as an i8.
llvm-svn: 144356
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 030fab16316..c2f0a7135d9 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -955,6 +955,7 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg, Address &Addr) {
switch (VT.getSimpleVT().SimpleTy) {
// This is mostly going to be Neon/vector support.
default: return false;
+ case MVT::i1:
case MVT::i8:
Opc = isThumb2 ? ARM::t2LDRBi12 : ARM::LDRBi12;
RC = ARM::GPRRegisterClass;
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