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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-15 16:22:24 +0000 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-15 16:22:24 +0000 |
commit | 018eedd9a57758bc8d7616769dbf1405dceaff57 (patch) | |
tree | 5544dc3df7d156beda1b082e8438cec89d505aab /llvm | |
parent | f6302523490cbd154aa98ce31b25ba5e77da9371 (diff) | |
download | bcm5719-llvm-018eedd9a57758bc8d7616769dbf1405dceaff57.tar.gz bcm5719-llvm-018eedd9a57758bc8d7616769dbf1405dceaff57.zip |
[SelectionDAG] Support BUILD_VECTOR implicit truncation in SelectionDAG::ComputeNumSignBits (PR32273)
llvm-svn: 297852
Diffstat (limited to 'llvm')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 17 | ||||
-rw-r--r-- | llvm/test/CodeGen/AArch64/dag-numsignbits.ll | 8 |
2 files changed, 18 insertions, 7 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 85747ac623b..026572222ea 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2906,9 +2906,20 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const { } case ISD::BUILD_VECTOR: - Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1); - for (unsigned i = 1, e = Op.getNumOperands(); (i < e) && (Tmp > 1); ++i) - Tmp = std::min(Tmp, ComputeNumSignBits(Op.getOperand(i), Depth + 1)); + Tmp = VTBits; + for (unsigned i = 0, e = Op.getNumOperands(); (i < e) && (Tmp > 1); ++i) { + SDValue SrcOp = Op.getOperand(i); + Tmp2 = ComputeNumSignBits(Op.getOperand(i), Depth + 1); + + // BUILD_VECTOR can implicitly truncate sources, we must handle this. + if (SrcOp.getValueSizeInBits() != VTBits) { + assert(SrcOp.getValueSizeInBits() > VTBits && + "Expected BUILD_VECTOR implicit truncation"); + unsigned ExtraBits = SrcOp.getValueSizeInBits() - VTBits; + Tmp2 = (Tmp2 > ExtraBits ? Tmp2 - ExtraBits : 1); + } + Tmp = std::min(Tmp, Tmp2); + } return Tmp; case ISD::SIGN_EXTEND: diff --git a/llvm/test/CodeGen/AArch64/dag-numsignbits.ll b/llvm/test/CodeGen/AArch64/dag-numsignbits.ll index 246d0e6f2b8..217c3df77c9 100644 --- a/llvm/test/CodeGen/AArch64/dag-numsignbits.ll +++ b/llvm/test/CodeGen/AArch64/dag-numsignbits.ll @@ -6,10 +6,10 @@ define void @signbits_vXi1(<4 x i16> %a1) { ; CHECK-LABEL: signbits_vXi1 ; CHECK: cmgt v0.4h, v1.4h, v0.4h ; CHECK-NEXT: and v0.8b, v0.8b, v2.8b -; CHECK-NEXT: umov w8, v0.h[0] -; CHECK-NEXT: umov w9, v0.h[3] -; CHECK-NEXT: and w0, w8, #0x1 -; CHECK-NEXT: and w3, w9, #0x1 +; CHECK-NEXT: shl v0.4h, v0.4h, #15 +; CHECK-NEXT: sshr v0.4h, v0.4h, #15 +; CHECK-NEXT: umov w0, v0.h[0] +; CHECK-NEXT: umov w3, v0.h[3] ; CHECK-NEXT: mov w1, wzr ; CHECK-NEXT: mov w2, wzr ; CHECK-NEXT: b foo |