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| author | Craig Topper <craig.topper@intel.com> | 2018-04-22 06:40:37 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-04-22 06:40:37 +0000 |
| commit | 9dcc50fcef32efbd8f49d7157349003ed996c230 (patch) | |
| tree | fced28cd92e225f941dcb9ebb9e11a23dbcf8def /llvm/utils | |
| parent | e958c7270e0176860f9eda7c9fdbf5c4b25327fb (diff) | |
| download | bcm5719-llvm-9dcc50fcef32efbd8f49d7157349003ed996c230.tar.gz bcm5719-llvm-9dcc50fcef32efbd8f49d7157349003ed996c230.zip | |
[X86] Remove an unnecessary HANDLE_OPTIONAL line from the disassembler operand processing.
llvm-svn: 330534
Diffstat (limited to 'llvm/utils')
| -rw-r--r-- | llvm/utils/TableGen/X86RecognizableInstr.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.cpp b/llvm/utils/TableGen/X86RecognizableInstr.cpp index 94452b2c9d8..80ebaa317e7 100644 --- a/llvm/utils/TableGen/X86RecognizableInstr.cpp +++ b/llvm/utils/TableGen/X86RecognizableInstr.cpp @@ -552,7 +552,6 @@ void RecognizableInstr::emitInstructionSpecifier() { HANDLE_OPERAND(rmRegister) HANDLE_OPTIONAL(immediate) HANDLE_OPTIONAL(immediate) // above might be a register in 7:4 - HANDLE_OPTIONAL(immediate) break; case X86Local::MRMSrcReg4VOp3: assert(numPhysicalOperands == 3 && |
