summaryrefslogtreecommitdiffstats
path: root/llvm/utils
diff options
context:
space:
mode:
authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-06-28 18:59:18 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-06-28 18:59:18 +0000
commit9b54878b38920840f989fd8ca08caa54aaf39279 (patch)
tree97f66b64b870f20b171a987631a8e2fa795a3001 /llvm/utils
parent378374d45735f2f1ca74e46988d003c17188d5ad (diff)
downloadbcm5719-llvm-9b54878b38920840f989fd8ca08caa54aaf39279.tar.gz
bcm5719-llvm-9b54878b38920840f989fd8ca08caa54aaf39279.zip
Break up long lines, NFC
llvm-svn: 306585
Diffstat (limited to 'llvm/utils')
-rw-r--r--llvm/utils/TableGen/RegisterInfoEmitter.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/utils/TableGen/RegisterInfoEmitter.cpp b/llvm/utils/TableGen/RegisterInfoEmitter.cpp
index 12cfb93a0c4..bebb1a183fc 100644
--- a/llvm/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/llvm/utils/TableGen/RegisterInfoEmitter.cpp
@@ -1195,7 +1195,8 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
OS << "\" };\n\n";
// Emit SubRegIndex lane masks, including 0.
- OS << "\nstatic const LaneBitmask SubRegIndexLaneMaskTable[] = {\n LaneBitmask::getAll(),\n";
+ OS << "\nstatic const LaneBitmask SubRegIndexLaneMaskTable[] = {\n "
+ "LaneBitmask::getAll(),\n";
for (const auto &Idx : SubRegIndices) {
printMask(OS << " ", Idx.LaneMask);
OS << ", // " << Idx.getName() << '\n';
@@ -1234,7 +1235,8 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
BitVector MaskBV(RegisterClasses.size());
for (const auto &RC : RegisterClasses) {
- OS << "static const uint32_t " << RC.getName() << "SubClassMask[] = {\n ";
+ OS << "static const uint32_t " << RC.getName()
+ << "SubClassMask[] = {\n ";
printBitVectorAsHex(OS, RC.getSubClasses(), 32);
// Emit super-reg class masks for any relevant SubRegIndices that can
OpenPOWER on IntegriCloud