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authorQuentin Colombet <qcolombet@apple.com>2014-08-20 21:51:26 +0000
committerQuentin Colombet <qcolombet@apple.com>2014-08-20 21:51:26 +0000
commit7e75cbaf47260f4bd22db4ac64d003e443cca672 (patch)
tree032ffe7bc6296a8a491c5d126ee147ff03873b25 /llvm/utils
parente229ec5bfcc937d629d7706416108d02cc103bb4 (diff)
downloadbcm5719-llvm-7e75cbaf47260f4bd22db4ac64d003e443cca672.tar.gz
bcm5719-llvm-7e75cbaf47260f4bd22db4ac64d003e443cca672.zip
Add isExtractSubreg property.
This patch adds a new property: isExtractSubreg and the related target hooks: TargetIntrInfo::getExtractSubregInputs and TargetInstrInfo::getExtractSubregLikeInputs to specify that a target specific instruction is a (kind of) EXTRACT_SUBREG. The approach is similar to r215394. <rdar://problem/12702965> llvm-svn: 216130
Diffstat (limited to 'llvm/utils')
-rw-r--r--llvm/utils/TableGen/CodeGenInstruction.cpp1
-rw-r--r--llvm/utils/TableGen/CodeGenInstruction.h1
-rw-r--r--llvm/utils/TableGen/InstrInfoEmitter.cpp1
3 files changed, 3 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenInstruction.cpp b/llvm/utils/TableGen/CodeGenInstruction.cpp
index 179858d7632..20edef5a71c 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/CodeGenInstruction.cpp
@@ -315,6 +315,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R)
hasCtrlDep = R->getValueAsBit("hasCtrlDep");
isNotDuplicable = R->getValueAsBit("isNotDuplicable");
isRegSequence = R->getValueAsBit("isRegSequence");
+ isExtractSubreg = R->getValueAsBit("isExtractSubreg");
bool Unset;
mayLoad = R->getValueAsBitOrUnset("mayLoad", Unset);
diff --git a/llvm/utils/TableGen/CodeGenInstruction.h b/llvm/utils/TableGen/CodeGenInstruction.h
index e0a9044dbfa..649fbc29ce7 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.h
+++ b/llvm/utils/TableGen/CodeGenInstruction.h
@@ -254,6 +254,7 @@ namespace llvm {
bool isCodeGenOnly : 1;
bool isPseudo : 1;
bool isRegSequence : 1;
+ bool isExtractSubreg : 1;
std::string DeprecatedReason;
bool HasComplexDeprecationPredicate;
diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index edd2f1f0e3c..86578a84d96 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -506,6 +506,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
if (Inst.hasExtraSrcRegAllocReq) OS << "|(1<<MCID::ExtraSrcRegAllocReq)";
if (Inst.hasExtraDefRegAllocReq) OS << "|(1<<MCID::ExtraDefRegAllocReq)";
if (Inst.isRegSequence) OS << "|(1<<MCID::RegSequence)";
+ if (Inst.isExtractSubreg) OS << "|(1<<MCID::ExtractSubreg)";
// Emit all of the target-specific flags...
BitsInit *TSF = Inst.TheDef->getValueAsBitsInit("TSFlags");
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