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authorEvan Cheng <evan.cheng@apple.com>2010-05-13 23:55:47 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-05-13 23:55:47 +0000
commit670a4104a931ff8ba7c10ae3a89902b4e68ab797 (patch)
treee7b99e8220828bb8c99250e5978fbf291c96de73 /llvm/utils
parent98f217118f5345ce317636e67a1c5c1b0baf06e0 (diff)
downloadbcm5719-llvm-670a4104a931ff8ba7c10ae3a89902b4e68ab797.tar.gz
bcm5719-llvm-670a4104a931ff8ba7c10ae3a89902b4e68ab797.zip
Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.
llvm-svn: 103746
Diffstat (limited to 'llvm/utils')
-rw-r--r--llvm/utils/TableGen/CodeGenTarget.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp
index 1efe2ff080d..f13f969dd35 100644
--- a/llvm/utils/TableGen/CodeGenTarget.cpp
+++ b/llvm/utils/TableGen/CodeGenTarget.cpp
@@ -80,6 +80,7 @@ std::string llvm::getEnumName(MVT::SimpleValueType T) {
case MVT::v1i64: return "MVT::v1i64";
case MVT::v2i64: return "MVT::v2i64";
case MVT::v4i64: return "MVT::v4i64";
+ case MVT::v8i64: return "MVT::v8i64";
case MVT::v2f32: return "MVT::v2f32";
case MVT::v4f32: return "MVT::v4f32";
case MVT::v8f32: return "MVT::v8f32";
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