diff options
| author | Nico Weber <nicolasweber@gmx.de> | 2019-06-14 17:58:34 +0000 |
|---|---|---|
| committer | Nico Weber <nicolasweber@gmx.de> | 2019-06-14 17:58:34 +0000 |
| commit | 3819e68b9c9d0ef26cc71923bb0398401bd7761c (patch) | |
| tree | 1361c3aeaf4e3cd2d3654b91cb5426e809f77909 /llvm/utils | |
| parent | 5254f0a9abab54eed4e2ca7a23ceca3b3bb65fd0 (diff) | |
| download | bcm5719-llvm-3819e68b9c9d0ef26cc71923bb0398401bd7761c.tar.gz bcm5719-llvm-3819e68b9c9d0ef26cc71923bb0398401bd7761c.zip | |
gn build: Simplify Target build files
Now that the cycle between MCTargetDesc and TargetInfo is gone
(see revisions 360709 360718 360722 360724 360726 360731 360733 360735 360736),
remove the dependency from TargetInfo on MCTargetDesc:tablegen. In most
targets, this makes MCTargetDesc:tablegen have just a single use, so
inline it there.
For AArch64, ARM, and RISCV there's still a similar cycle between
MCTargetDesc and Utils, so the MCTargetDesc:tablegen indirection is
still needed there.
Differential Revision: https://reviews.llvm.org/D63200
llvm-svn: 363436
Diffstat (limited to 'llvm/utils')
21 files changed, 73 insertions, 159 deletions
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/MCTargetDesc/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/MCTargetDesc/BUILD.gn index 6336416b927..b2603e8e5bc 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/MCTargetDesc/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/MCTargetDesc/BUILD.gn @@ -45,7 +45,6 @@ tablegen("AArch64GenSubtargetInfo") { group("tablegen") { visibility = [ ":MCTargetDesc", - "../TargetInfo", "../Utils", ] public_deps = [ diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/TargetInfo/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/TargetInfo/BUILD.gn index 114d93f15e7..25565c216a9 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/TargetInfo/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/TargetInfo/BUILD.gn @@ -2,10 +2,6 @@ static_library("TargetInfo") { output_name = "LLVMAArch64Info" deps = [ "//llvm/lib/Support", - - # MCTargetDesc depends on TargetInfo, so we can't depend on the full - # MCTargetDesc target here: it would form a cycle. - "//llvm/lib/Target/AArch64/MCTargetDesc:tablegen", ] include_dirs = [ ".." ] sources = [ diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/Utils/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/Utils/BUILD.gn index 144bd5cafef..aef50a013bd 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/Utils/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/Utils/BUILD.gn @@ -13,6 +13,9 @@ static_library("Utils") { ] deps = [ "//llvm/lib/Support", + + # MCTargetDesc depends on Utils, so we can't depend on the full + # MCTargetDesc target here: it would form a cycle. "//llvm/lib/Target/AArch64/MCTargetDesc:tablegen", ] diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn index 098e2ab5aaf..5e719048b68 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn @@ -36,7 +36,6 @@ tablegen("ARMGenSubtargetInfo") { group("tablegen") { visibility = [ ":MCTargetDesc", - "../TargetInfo", "../Utils", ] public_deps = [ @@ -45,6 +44,7 @@ group("tablegen") { ":ARMGenSubtargetInfo", ] } + static_library("MCTargetDesc") { output_name = "LLVMARMDesc" public_deps = [ diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/TargetInfo/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/TargetInfo/BUILD.gn index 521367c4f42..b6c3b6594f8 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/TargetInfo/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/TargetInfo/BUILD.gn @@ -2,10 +2,6 @@ static_library("TargetInfo") { output_name = "LLVMARMInfo" deps = [ "//llvm/lib/Support", - - # MCTargetDesc depends on TargetInfo, so we can't depend on the full - # MCTargetDesc target here: it would form a cycle. - "//llvm/lib/Target/ARM/MCTargetDesc:tablegen", ] include_dirs = [ ".." ] sources = [ diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/Utils/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/Utils/BUILD.gn index e0ddc22f90b..5303a32fe75 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/Utils/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/Utils/BUILD.gn @@ -13,6 +13,9 @@ static_library("Utils") { ] deps = [ "//llvm/lib/Support", + + # MCTargetDesc depends on Utils, so we can't depend on the full + # MCTargetDesc target here: it would form a cycle. "//llvm/lib/Target/ARM/MCTargetDesc:tablegen", ] diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/BPF/MCTargetDesc/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/BPF/MCTargetDesc/BUILD.gn index 6c31eb48750..445df9f8e0e 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/BPF/MCTargetDesc/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/BPF/MCTargetDesc/BUILD.gn @@ -7,7 +7,7 @@ tablegen("BPFGenAsmWriter") { } tablegen("BPFGenInstrInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-instr-info" ] td_file = "../BPF.td" } @@ -19,37 +19,28 @@ tablegen("BPFGenMCCodeEmitter") { } tablegen("BPFGenRegisterInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-register-info" ] td_file = "../BPF.td" } tablegen("BPFGenSubtargetInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-subtarget" ] td_file = "../BPF.td" } -# This should contain tablegen targets generating .inc files included -# by other targets. .inc files only used by .cpp files in this directory -# should be in deps on the static_library instead. -group("tablegen") { - visibility = [ - ":MCTargetDesc", - "../TargetInfo", - ] +static_library("MCTargetDesc") { + output_name = "LLVMBPFDesc" + + # This should contain tablegen targets generating .inc files included + # by other targets. .inc files only used by .cpp files in this directory + # should be in deps instead. public_deps = [ ":BPFGenInstrInfo", ":BPFGenRegisterInfo", ":BPFGenSubtargetInfo", ] -} - -static_library("MCTargetDesc") { - output_name = "LLVMBPFDesc" - public_deps = [ - ":tablegen", - ] deps = [ ":BPFGenAsmWriter", ":BPFGenMCCodeEmitter", diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/BPF/TargetInfo/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/BPF/TargetInfo/BUILD.gn index 1fd264d70f8..bb509630e08 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/BPF/TargetInfo/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/BPF/TargetInfo/BUILD.gn @@ -2,10 +2,6 @@ static_library("TargetInfo") { output_name = "LLVMBPFInfo" deps = [ "//llvm/lib/Support", - - # MCTargetDesc depends on TargetInfo, so we can't depend on the full - # MCTargetDesc target here: it would form a cycle. - "//llvm/lib/Target/BPF/MCTargetDesc:tablegen", ] include_dirs = [ ".." ] sources = [ diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/MCTargetDesc/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/MCTargetDesc/BUILD.gn index 55eb01f2d83..4b7d2b7119c 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/MCTargetDesc/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/MCTargetDesc/BUILD.gn @@ -7,7 +7,7 @@ tablegen("HexagonGenAsmWriter") { } tablegen("HexagonGenInstrInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-instr-info" ] td_file = "../Hexagon.td" } @@ -19,34 +19,28 @@ tablegen("HexagonGenMCCodeEmitter") { } tablegen("HexagonGenRegisterInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-register-info" ] td_file = "../Hexagon.td" } tablegen("HexagonGenSubtargetInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-subtarget" ] td_file = "../Hexagon.td" } -group("tablegen") { - visibility = [ - ":MCTargetDesc", - "../TargetInfo", - ] +static_library("MCTargetDesc") { + output_name = "LLVMHexagonDesc" + + # This should contain tablegen targets generating .inc files included + # by other targets. .inc files only used by .cpp files in this directory + # should be in deps instead. public_deps = [ ":HexagonGenInstrInfo", ":HexagonGenRegisterInfo", ":HexagonGenSubtargetInfo", ] -} - -static_library("MCTargetDesc") { - output_name = "LLVMHexagonDesc" - public_deps = [ - ":tablegen", - ] deps = [ ":HexagonGenAsmWriter", ":HexagonGenMCCodeEmitter", diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/TargetInfo/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/TargetInfo/BUILD.gn index d9e909052cf..d12eeb40a27 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/TargetInfo/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/TargetInfo/BUILD.gn @@ -1,12 +1,7 @@ static_library("TargetInfo") { output_name = "LLVMHexagonInfo" deps = [ - "//llvm/lib/IR", "//llvm/lib/Support", - - # MCTargetDesc depends on TargetInfo, so we can't depend on the full - # MCTargetDesc target here: it would form a cycle. - "//llvm/lib/Target/Hexagon/MCTargetDesc:tablegen", ] include_dirs = [ ".." ] sources = [ diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/Lanai/MCTargetDesc/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/Lanai/MCTargetDesc/BUILD.gn index 9269924f773..3c24029ebe2 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/Lanai/MCTargetDesc/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/Lanai/MCTargetDesc/BUILD.gn @@ -7,7 +7,7 @@ tablegen("LanaiGenAsmWriter") { } tablegen("LanaiGenInstrInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-instr-info" ] td_file = "../Lanai.td" } @@ -19,37 +19,28 @@ tablegen("LanaiGenMCCodeEmitter") { } tablegen("LanaiGenRegisterInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-register-info" ] td_file = "../Lanai.td" } tablegen("LanaiGenSubtargetInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-subtarget" ] td_file = "../Lanai.td" } -# This should contain tablegen targets generating .inc files included -# by other targets. .inc files only used by .cpp files in this directory -# should be in deps on the static_library instead. -group("tablegen") { - visibility = [ - ":MCTargetDesc", - "../TargetInfo", - ] +static_library("MCTargetDesc") { + output_name = "LLVMLanaiDesc" + + # This should contain tablegen targets generating .inc files included + # by other targets. .inc files only used by .cpp files in this directory + # should be in deps instead. public_deps = [ ":LanaiGenInstrInfo", ":LanaiGenRegisterInfo", ":LanaiGenSubtargetInfo", ] -} - -static_library("MCTargetDesc") { - output_name = "LLVMLanaiDesc" - public_deps = [ - ":tablegen", - ] deps = [ ":LanaiGenAsmWriter", ":LanaiGenMCCodeEmitter", diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/Lanai/TargetInfo/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/Lanai/TargetInfo/BUILD.gn index c814ac4f33e..54f23dc3f64 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/Lanai/TargetInfo/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/Lanai/TargetInfo/BUILD.gn @@ -1,7 +1,6 @@ static_library("TargetInfo") { output_name = "LLVMLanaiInfo" deps = [ - "//llvm/lib/IR", "//llvm/lib/Support", ] include_dirs = [ ".." ] diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/MCTargetDesc/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/MCTargetDesc/BUILD.gn index 4bc058db553..9a5d72ad3a8 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/MCTargetDesc/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/MCTargetDesc/BUILD.gn @@ -7,7 +7,7 @@ tablegen("PPCGenAsmWriter") { } tablegen("PPCGenInstrInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-instr-info" ] td_file = "../PPC.td" } @@ -19,38 +19,28 @@ tablegen("PPCGenMCCodeEmitter") { } tablegen("PPCGenRegisterInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-register-info" ] td_file = "../PPC.td" } tablegen("PPCGenSubtargetInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-subtarget" ] td_file = "../PPC.td" } -# This should contain tablegen targets generating .inc files included -# by other targets. .inc files only used by .cpp files in this directory -# should be in deps on the static_library instead. -group("tablegen") { - visibility = [ - ":MCTargetDesc", - "../InstPrinter", - "../TargetInfo", - ] +static_library("MCTargetDesc") { + output_name = "LLVMPowerPCDesc" + + # This should contain tablegen targets generating .inc files included + # by other targets. .inc files only used by .cpp files in this directory + # should be in deps instead. public_deps = [ ":PPCGenInstrInfo", ":PPCGenRegisterInfo", ":PPCGenSubtargetInfo", ] -} - -static_library("MCTargetDesc") { - output_name = "LLVMPowerPCDesc" - public_deps = [ - ":tablegen", - ] deps = [ ":PPCGenAsmWriter", ":PPCGenMCCodeEmitter", diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/TargetInfo/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/TargetInfo/BUILD.gn index c706924563d..405e442c53b 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/TargetInfo/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/TargetInfo/BUILD.gn @@ -2,10 +2,6 @@ static_library("TargetInfo") { output_name = "LLVMPowerPCInfo" deps = [ "//llvm/lib/Support", - - # MCTargetDesc depends on TargetInfo, so we can't depend on the full - # MCTargetDesc target here: it would form a cycle. - "//llvm/lib/Target/PowerPC/MCTargetDesc:tablegen", ] include_dirs = [ ".." ] sources = [ diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn index 62c630a6c4a..66924bed532 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn @@ -14,6 +14,9 @@ static_library("Utils") { deps = [ "//llvm/lib/MC", "//llvm/lib/Support", + + # MCTargetDesc depends on Utils, so we can't depend on the full + # MCTargetDesc target here: it would form a cycle. "//llvm/lib/Target/RISCV/MCTargetDesc:tablegen", ] diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/Sparc/MCTargetDesc/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/Sparc/MCTargetDesc/BUILD.gn index 15e9057fd0c..f6b5587f581 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/Sparc/MCTargetDesc/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/Sparc/MCTargetDesc/BUILD.gn @@ -7,7 +7,7 @@ tablegen("SparcGenAsmWriter") { } tablegen("SparcGenInstrInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-instr-info" ] td_file = "../Sparc.td" } @@ -19,37 +19,28 @@ tablegen("SparcGenMCCodeEmitter") { } tablegen("SparcGenRegisterInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-register-info" ] td_file = "../Sparc.td" } tablegen("SparcGenSubtargetInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-subtarget" ] td_file = "../Sparc.td" } -# This should contain tablegen targets generating .inc files included -# by other targets. .inc files only used by .cpp files in this directory -# should be in deps on the static_library instead. -group("tablegen") { - visibility = [ - ":MCTargetDesc", - "../TargetInfo", - ] +static_library("MCTargetDesc") { + output_name = "LLVMSparcDesc" + + # This should contain tablegen targets generating .inc files included + # by other targets. .inc files only used by .cpp files in this directory + # should be in deps instead. public_deps = [ ":SparcGenInstrInfo", ":SparcGenRegisterInfo", ":SparcGenSubtargetInfo", ] -} - -static_library("MCTargetDesc") { - output_name = "LLVMSparcDesc" - public_deps = [ - ":tablegen", - ] deps = [ ":SparcGenAsmWriter", ":SparcGenMCCodeEmitter", diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/Sparc/TargetInfo/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/Sparc/TargetInfo/BUILD.gn index 908d66202de..6dbac501bb8 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/Sparc/TargetInfo/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/Sparc/TargetInfo/BUILD.gn @@ -1,9 +1,7 @@ static_library("TargetInfo") { output_name = "LLVMSparcInfo" deps = [ - "//llvm/lib/IR", "//llvm/lib/Support", - "//llvm/lib/Target/Sparc/MCTargetDesc", ] include_dirs = [ ".." ] sources = [ diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/MCTargetDesc/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/MCTargetDesc/BUILD.gn index 326525cd42b..146f10b3e76 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/MCTargetDesc/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/MCTargetDesc/BUILD.gn @@ -7,7 +7,7 @@ tablegen("WebAssemblyGenAsmWriter") { } tablegen("WebAssemblyGenInstrInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-instr-info" ] td_file = "../WebAssembly.td" } @@ -19,38 +19,28 @@ tablegen("WebAssemblyGenMCCodeEmitter") { } tablegen("WebAssemblyGenRegisterInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-register-info" ] td_file = "../WebAssembly.td" } tablegen("WebAssemblyGenSubtargetInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-subtarget" ] td_file = "../WebAssembly.td" } -# This should contain tablegen targets generating .inc files included -# by other targets. .inc files only used by .cpp files in this directory -# should be in deps on the static_library instead. -group("tablegen") { - visibility = [ - ":MCTargetDesc", - "../InstPrinter", - "../TargetInfo", - "../Utils", - ] +static_library("MCTargetDesc") { + output_name = "LLVMWebAssemblyDesc" + + # This should contain tablegen targets generating .inc files included + # by other targets. .inc files only used by .cpp files in this directory + # should be in deps instead. public_deps = [ ":WebAssemblyGenInstrInfo", ":WebAssemblyGenRegisterInfo", ":WebAssemblyGenSubtargetInfo", ] -} -static_library("MCTargetDesc") { - output_name = "LLVMWebAssemblyDesc" - public_deps = [ - ":tablegen", - ] deps = [ ":WebAssemblyGenAsmWriter", ":WebAssemblyGenMCCodeEmitter", diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/TargetInfo/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/TargetInfo/BUILD.gn index 334183bb5d6..63f5ca1afa2 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/TargetInfo/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/TargetInfo/BUILD.gn @@ -2,10 +2,6 @@ static_library("TargetInfo") { output_name = "LLVMWebAssemblyInfo" deps = [ "//llvm/lib/Support", - - # MCTargetDesc depends on TargetInfo, so we can't depend on the full - # MCTargetDesc target here: it would form a cycle. - "//llvm/lib/Target/WebAssembly/MCTargetDesc:tablegen", ] include_dirs = [ ".." ] sources = [ diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/X86/MCTargetDesc/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/X86/MCTargetDesc/BUILD.gn index 05747037d04..735a84d9305 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/X86/MCTargetDesc/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/X86/MCTargetDesc/BUILD.gn @@ -16,43 +16,34 @@ tablegen("X86GenAsmWriter1") { } tablegen("X86GenInstrInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-instr-info" ] td_file = "../X86.td" } tablegen("X86GenRegisterInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-register-info" ] td_file = "../X86.td" } tablegen("X86GenSubtargetInfo") { - visibility = [ ":tablegen" ] + visibility = [ ":MCTargetDesc" ] args = [ "-gen-subtarget" ] td_file = "../X86.td" } -# This should contain tablegen targets generating .inc files included -# by other targets. .inc files only used by .cpp files in this directory -# should be in deps on the static_library instead. -group("tablegen") { - visibility = [ - ":MCTargetDesc", - "../TargetInfo", - ] +static_library("MCTargetDesc") { + output_name = "LLVMX86Desc" + + # This should contain tablegen targets generating .inc files included + # by other targets. .inc files only used by .cpp files in this directory + # should be in deps instead. public_deps = [ ":X86GenInstrInfo", ":X86GenRegisterInfo", ":X86GenSubtargetInfo", ] -} - -static_library("MCTargetDesc") { - output_name = "LLVMX86Desc" - public_deps = [ - ":tablegen", - ] deps = [ ":X86GenAsmWriter", ":X86GenAsmWriter1", diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/X86/TargetInfo/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/X86/TargetInfo/BUILD.gn index 6b0ed1d5448..16588757b19 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/X86/TargetInfo/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/X86/TargetInfo/BUILD.gn @@ -2,10 +2,6 @@ static_library("TargetInfo") { output_name = "LLVMX86Info" deps = [ "//llvm/lib/Support", - - # MCTargetDesc depends on TargetInfo, so we can't depend on the full - # MCTargetDesc target here: it would form a cycle. - "//llvm/lib/Target/X86/MCTargetDesc:tablegen", ] include_dirs = [ ".." ] sources = [ |

