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author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2018-04-04 11:53:13 +0000 |
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committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2018-04-04 11:53:13 +0000 |
commit | 378d75ac17a960e12fe89b77ae50e135cb109f6b (patch) | |
tree | 8413586145f7e9d1be56ee1b8a4842414c5745c5 /llvm/utils | |
parent | 5988842469fc9b1ea96d7b54c83fb029142f4719 (diff) | |
download | bcm5719-llvm-378d75ac17a960e12fe89b77ae50e135cb109f6b.tar.gz bcm5719-llvm-378d75ac17a960e12fe89b77ae50e135cb109f6b.zip |
[Tablegen] Slightly refactor method SubtargetEmitter::EmitExtraProcessorInfo.
This patch moves most of the logic from EmitExtraProcessorInfo to a couple of
helper functions. No functional change intended.
llvm-svn: 329173
Diffstat (limited to 'llvm/utils')
-rw-r--r-- | llvm/utils/TableGen/SubtargetEmitter.cpp | 51 |
1 files changed, 41 insertions, 10 deletions
diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp index 30d76f782a7..a80ce6108f0 100644 --- a/llvm/utils/TableGen/SubtargetEmitter.cpp +++ b/llvm/utils/TableGen/SubtargetEmitter.cpp @@ -90,7 +90,10 @@ class SubtargetEmitter { void EmitItineraries(raw_ostream &OS, std::vector<std::vector<InstrItinerary>> &ProcItinLists); - void EmitExtraProcessorInfo(const CodeGenProcModel &ProcModel, raw_ostream &OS); + unsigned EmitRegisterFileTables(const CodeGenProcModel &ProcModel, + raw_ostream &OS); + void EmitExtraProcessorInfo(const CodeGenProcModel &ProcModel, + raw_ostream &OS); void EmitProcessorProp(raw_ostream &OS, const Record *R, StringRef Name, char Separator); void EmitProcessorResourceSubUnits(const CodeGenProcModel &ProcModel, @@ -605,12 +608,29 @@ void SubtargetEmitter::EmitProcessorResourceSubUnits( OS << "};\n"; } -void SubtargetEmitter::EmitExtraProcessorInfo(const CodeGenProcModel &ProcModel, - raw_ostream &OS) { +static void EmitRegisterFileInfo(const CodeGenProcModel &ProcModel, + unsigned NumRegisterFiles, + unsigned NumCostEntries, raw_ostream &OS) { + if (NumRegisterFiles) + OS << ProcModel.ModelName << "RegisterFiles,\n " << (1 + NumRegisterFiles); + else + OS << "nullptr,\n 0,\n "; + + OS << ", // Number of register files.\n "; + if (NumCostEntries) + OS << ProcModel.ModelName << "RegisterCosts,\n "; + else + OS << "nullptr, \n"; + OS << NumCostEntries << " // Number of register cost entries.\n"; +} + +unsigned +SubtargetEmitter::EmitRegisterFileTables(const CodeGenProcModel &ProcModel, + raw_ostream &OS) { if (llvm::all_of(ProcModel.RegisterFiles, [](const CodeGenRegisterFile &RF) { return RF.hasDefaultCosts(); })) - return; + return 0; // Print the RegisterCost table first. OS << "\n// {RegisterClassID, Register Cost}\n"; @@ -650,14 +670,25 @@ void SubtargetEmitter::EmitExtraProcessorInfo(const CodeGenProcModel &ProcModel, } OS << "};\n"; + return CostTblIndex; +} + +void SubtargetEmitter::EmitExtraProcessorInfo(const CodeGenProcModel &ProcModel, + raw_ostream &OS) { + // Generate a table of register file descriptors (one entry per each user + // defined register file), and a table of register costs. + unsigned NumCostEntries = EmitRegisterFileTables(ProcModel, OS); + // Now generate a table for the extra processor info. OS << "\nstatic const llvm::MCExtraProcessorInfo " << ProcModel.ModelName - << "ExtraInfo = {\n " << ProcModel.ModelName << "RegisterFiles,\n " - << (1 + ProcModel.RegisterFiles.size()) - << ", // Number of register files.\n " - << ProcModel.ModelName << "RegisterCosts,\n " << CostTblIndex - << " // Number of register cost entries.\n" - << "};\n"; + << "ExtraInfo = {\n "; + + // Add information related to the register files (i.e. where to find register + // file descriptors and register costs). + EmitRegisterFileInfo(ProcModel, ProcModel.RegisterFiles.size(), + NumCostEntries, OS); + + OS << "};\n"; } void SubtargetEmitter::EmitProcessorResources(const CodeGenProcModel &ProcModel, |