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authorJim Grosbach <grosbach@apple.com>2011-03-11 23:11:41 +0000
committerJim Grosbach <grosbach@apple.com>2011-03-11 23:11:41 +0000
commit376d5e8772a51381141a437c1b3a34d2610a0299 (patch)
treed35b56b087507f2bf21817ec866ce85ffa5536d4 /llvm/utils
parente9e27d95db1dc5d8f061e20e2dec8e6032c2ab3e (diff)
downloadbcm5719-llvm-376d5e8772a51381141a437c1b3a34d2610a0299.tar.gz
bcm5719-llvm-376d5e8772a51381141a437c1b3a34d2610a0299.zip
Remove dead code. These ARM instruction definitions no longer exist.
llvm-svn: 127508
Diffstat (limited to 'llvm/utils')
-rw-r--r--llvm/utils/TableGen/ARMDecoderEmitter.cpp9
1 files changed, 0 insertions, 9 deletions
diff --git a/llvm/utils/TableGen/ARMDecoderEmitter.cpp b/llvm/utils/TableGen/ARMDecoderEmitter.cpp
index 67e2bafa8f9..4c081875eeb 100644
--- a/llvm/utils/TableGen/ARMDecoderEmitter.cpp
+++ b/llvm/utils/TableGen/ARMDecoderEmitter.cpp
@@ -1600,15 +1600,6 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI,
Name == "FNEGDcc")
return false;
- // Ditto for VNEGDcc and VNEGScc.
- if (Name == "VNEGDcc" || Name == "VNEGScc")
- return false;
-
- // LDMIA_RET is a special case of LDM (Load Multiple) where the registers
- // loaded include the PC, causing a branch to a loaded address. Ignore
- // the LDMIA_RET instruction when decoding.
- if (Name == "LDMIA_RET") return false;
-
// Bcc is in a more generic form than B. Ignore B when decoding.
if (Name == "B") return false;
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