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| author | Jessica Paquette <jpaquette@apple.com> | 2019-01-24 22:00:41 +0000 |
|---|---|---|
| committer | Jessica Paquette <jpaquette@apple.com> | 2019-01-24 22:00:41 +0000 |
| commit | 245047dfe8b4abcdce02b7f16f464ed1d86ccbee (patch) | |
| tree | 3ac054f59a0d0eee97a5d3ddc481b550116b1bae /llvm/utils | |
| parent | 38ebaf7d5d25ef3113a6ab4bf19ed4e1869373ab (diff) | |
| download | bcm5719-llvm-245047dfe8b4abcdce02b7f16f464ed1d86ccbee.tar.gz bcm5719-llvm-245047dfe8b4abcdce02b7f16f464ed1d86ccbee.zip | |
[GlobalISel][AArch64] Add isel support for FP16 vector @llvm.ceil
This patch adds support for vector @llvm.ceil intrinsics when full 16 bit
floating point support isn't available.
To do this, this patch...
- Implements basic isel for G_UNMERGE_VALUES
- Teaches the legalizer about 16 bit floats
- Teaches AArch64RegisterBankInfo to respect floating point registers on
G_BUILD_VECTOR and G_UNMERGE_VALUES
- Teaches selectCopy about 16-bit floating point vectors
It also adds
- A legalizer test for the 16-bit vector ceil which verifies that we create a
G_UNMERGE_VALUES and G_BUILD_VECTOR when full fp16 isn't supported
- An instruction selection test which makes sure we lower to G_FCEIL when
full fp16 is supported
- A test for selecting G_UNMERGE_VALUES
And also updates arm64-vfloatintrinsics.ll to show that the new ceiling types
work as expected.
https://reviews.llvm.org/D56682
llvm-svn: 352113
Diffstat (limited to 'llvm/utils')
0 files changed, 0 insertions, 0 deletions
