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| author | Chris Lattner <sabre@nondot.org> | 2006-04-28 01:46:50 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-04-28 01:46:50 +0000 |
| commit | 84e95d00b57b428208b38a9452ceb5315c11db35 (patch) | |
| tree | 3a5494c4d8cf472aa68e476f9f3221e393a2f032 /llvm/utils/llvm-native-gcc | |
| parent | c4d77c46b8050445a2cb3391ef8bb34d5e194325 (diff) | |
| download | bcm5719-llvm-84e95d00b57b428208b38a9452ceb5315c11db35.tar.gz bcm5719-llvm-84e95d00b57b428208b38a9452ceb5315c11db35.zip | |
When we have a two-address instruction where the input cannot be clobbered
and is already available, instead of falling back to emitting a load, fall
back to emitting a reg-reg copy. This generates significantly better code
for some SSE testcases, as SSE has lots of two-address instructions and
none of them are read/modify/write. As one example, this change does:
pshufd %XMM5, XMMWORD PTR [%ESP + 84], 255
xorps %XMM2, %XMM5
cmpltps %XMM1, %XMM0
- movaps XMMWORD PTR [%ESP + 52], %XMM0
- movapd %XMM6, XMMWORD PTR [%ESP + 52]
+ movaps %XMM6, %XMM0
cmpltps %XMM6, XMMWORD PTR [%ESP + 68]
movapd XMMWORD PTR [%ESP + 52], %XMM6
movaps %XMM6, %XMM0
cmpltps %XMM6, XMMWORD PTR [%ESP + 36]
cmpltps %XMM3, %XMM0
- movaps XMMWORD PTR [%ESP + 20], %XMM0
- movapd %XMM7, XMMWORD PTR [%ESP + 20]
+ movaps %XMM7, %XMM0
cmpltps %XMM7, XMMWORD PTR [%ESP + 4]
movapd XMMWORD PTR [%ESP + 20], %XMM7
cmpltps %XMM4, %XMM0
... which is far better than a store followed by a load!
llvm-svn: 28001
Diffstat (limited to 'llvm/utils/llvm-native-gcc')
0 files changed, 0 insertions, 0 deletions

