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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-08-18 15:08:30 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-08-18 15:08:30 +0000 |
| commit | 9eb0869e91b3b701813ef88eacf96f3636dfc719 (patch) | |
| tree | fe78cc937109dd2362ad3fd03cff0af4358c10ef /llvm/utils/lit/tests/xunit-output.py | |
| parent | 8d5b257d02451437d5898b6ae35404c5ebe2e07c (diff) | |
| download | bcm5719-llvm-9eb0869e91b3b701813ef88eacf96f3636dfc719.tar.gz bcm5719-llvm-9eb0869e91b3b701813ef88eacf96f3636dfc719.zip | |
[X86][PCLMUL] Add scheduling latency/throughput test for PCLMULQDQ instruction
Added it to the SSE42 tests as targets seem to always have both
llvm-svn: 311166
Diffstat (limited to 'llvm/utils/lit/tests/xunit-output.py')
0 files changed, 0 insertions, 0 deletions
